1

SY100S341

Micrel, Inc.

M9999-032206

hbwhelp@micrel.com or (408) 955-1690

Label

Function

CP

Clock Pulse Input

Select Inputs

Serial Inputs

Parallel Inputs

Data Outputs

SY100S341

8-BIT SHIFT

REGISTER

s Max. shift frequency of 600MHz

s Max. Clock to Q delay of 1200ps

s Industry standard 100K ECL levels

s Extended supply voltage option:

s Voltage and temperature compensation for improved

noise immunity

s Internal 75K

s 70% faster than Fairchild 300K at lower power

s Function and pinout compatible with Fairchild F100K

s Available in 24-pin CERPACK and 28-pin PLCC

packages

FEATURES

DESCRIPTION

The SY100S341 offer eight D-type, edge-triggered flip-

flops with both individual inputs for parallel operation as

well as serial inputs for bidirectional shifting, and are

designed for use in high-performance ECL systems. Data

is clocked into the flip-flops on the rising edge of the clock.

The mode of operation is selected by two Select inputs

or parallel entry function, as described in the Truth Table.

The inputs on these devices have 75K

Ω pull-down resistors.

PIN NAMES

Rev.: H

Amendment: /0

Issue Date:

March 2006