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LD5532 датащи(PDF) 11 Page - Leadtrend Technology

номер детали LD5532
подробное описание детали  Green-Mode PWM Controller with Frequency Swapping and Audio Noise Prevention
PDF  18 Pages
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производитель  LEADTREND [Leadtrend Technology]
домашняя страница  https://www.leadtrend.com.tw/
Logo LEADTREND - Leadtrend Technology

LD5532 датащи(HTML) 11 Page - Leadtrend Technology

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LD5532
11
Leadtrend Technology Corporation
www.leadtrend.com.tw
LD5532-DS-00 July 2014
sensing pin is set at 0.85V. From above, the MOSFET peak
current can be obtained from below.
S
)
MAX
(
PEAK
R
V
85
.
0
I
R1
OUT
CS
VCC
GND
LD5532
C1
Cbulk
D1
Rs
Comp
Vin
AC
Line
Fig. 19
A 250nS leading-edge blanking (LEB) time is included in the
input of CS pin to prevent the false-trigger from the current
spike. In the low power applications, if the total pulse width
of the turn-on spikes is less than 250nS and the negative
spike on the CS pin below -0.3V, the R-C filter is free to
eliminate, as shown in Fig.20.
However, the total pulse width of the turn-on spike is
determined according to output power, circuit design and
PCB layout.
It is strongly recommended to adopt a smaller
R-C filter (as shown in Fig. 21) for larger power applications
to avoid the CS pin being damaged by the negative turn-on
spike.
Acoustic Noise Improvement Solution
The grouping frequency FG is set at 800Hz to prevent
acoustic noise and also to limit the duty cycle in burst mode
region.
Output Stage and Maximum Duty-Cycle
An output stage of a CMOS buffer, with typical 300mA
driving capability, is incorporated to drive a power MOSFET
directly.
And the maximum duty-cycle of LD5532 is limited
to 75% to avoid the transformer saturation.
Voltage Feedback Loop
The voltage feedback signal is provided from the TL431 at
the secondary side through the photo-coupler to the COMP
pin of the LD5532.
Similar to UC3842, the LD5532 would
carry a diode voltage offset at the stage to feed the voltage
divider at the ratio of 2RB and RB, that is,
)
V
(V
RB
2RB
RB
V
F
COMP
)
(PWM
COMPARATOR
A pull-high resistor is embedded internally and can be
eliminated externally.
CS
VCC
GND
LD5532
Removable if the negative spike
is not over spec. (-0.3V).
OUT
230ns
blanking
time
AC
Line
Fig. 20



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