Table 3.2: GPIO Muxed Pins

Pin Name

Flash1

SDIO

SPI

UART2(Default

/SWAP=1)

I2C Master

PWM

Analog

External_PA

JTAG (Default

/SWAP=1)

IR

PAD_GPIO_16

-

-

MISO

/MOSI

SIG0/SIG4

SCL

PWM_CH1

-

FEM0

TMS/TCK

-

PAD_GPIO_17

SF1_D3

-

MOSI

/MISO

SIG1/SIG5

SDA

PWM_CH2

-

FEM1

TDI/TDO

-

PAD_GPIO_18

SF1_D2

-

SS

SIG2/SIG6

SCL

PWM_CH3

-

FEM2

TCK/TMS

-

PAD_GPIO_19

SF1_D1

-

SCLK

SIG3/SIG7

SDA

PWM_CH4

-

FEM3

TDO/TDI

-

PAD_GPIO_20

SF1_D0

/SF2_D0

-

MISO

/MOSI

SIG4/SIG0

SCL

PWM_CH0

-

FEM0

TMS/TCK

-

PAD_GPIO_21

SF1_CS

/SF2_CS

-

MOSI

/MISO

SIG5/SIG1

SDA

PWM_CH1

-

FEM1

TDI/TDO

-

PAD_GPIO_22

SF1_CLK

/SF2_CLK

-

SS

SIG6/SIG2

SCL

PWM_CH2

-

FEM2

TCK/TMS

-

PAD_GPIO_23

SF0_CLK

-

-

-

-

-

-

-

-

-

PAD_GPIO_24

SF0_CS

-

-

-

-

-

-

-

-

-

PAD_GPIO_25

SF0_D0

-

-

-

-

-

-

-

-

-

PAD_GPIO_26

SF0_D1

-

-

-

-

-

-

-

-

-

PAD_GPIO_27

SF0_D2

-

-

-

-

-

-

-

-

-

PAD_GPIO_28

SF0_D3

-

-

-

-

-

-

-

-

-

1 There are 3 groups of Flash, and the smallest selection unit is group, which is configured according to group when used.

2 The default UART signal mapping table is shown below.