BP3309 datasheet(7/8 Pages) BPS

7 / 8 page

BP3309

PSR Single-Stage APFC Offline LED Controller

BP3309_DS_Rev 1.2

www.bpsemi.com

Bright Power Semiconductor Co. Confidential – Customer Use Only

The current in LED can be calculated by the

equation:

OUT

Rcs





REF

Where,

VREF: Internal reference voltage, typical 0.3V

NP: Primary winding turns of transformer

NS: Secondary winding turns of transformer

Feedback Network

The BP3309 senses the output current crossing zero

through the feedback network, the FB falling

threshold voltage is set to 0.4V with 0.6V hysteresis.

The FB pin is also used to detect output OVP, the

threshold voltage is 5.5V. The ratio of FB upper

resistor to lower resistor can be set as:

OVP

FBH

FBL







Where,

RFBL: The lower resistor of the feedback network

RFBH: The upper resistor of the feedback network

VOVP: Output over voltage setting point

NS: Secondary winding turns of transformer

NA: Auxiliary winding turns of transformer

The FB upper resistor can be set to around 300KΩ to

improve the system efficiency. It is also used for fine

tuning the LED current line compensation.

Protection Function

The BP3309 has many protection functions to

improve the system reliability. When the voltage on

VCC reaches the corresponding 20V OVP threshold,

such as under open LED condition, it will trigger

fault logic and latch, the system stops switching.

When the LED is shorted circuit, the system will

work under 7kHz switching frequency, so the power

consumption is low. At the same while, the COMP

pin voltage will rise up until it reaches 4.5V. It will

trigger fault logic and latch, the system stops

switching. At some catastrophic fault condition, such

as shorted CS resistor or flyback transformer

saturation, the internal fast fault detection circuit will

trigger and the system stop switching immediately.

The over temperature protection circuitry in the

BP3309 monitors the die junction temperature after

start up. When the temperature rises to 150℃, the

system will stop switching and latched. The power

MOSFET will be shut down immediately and

maintains

switch

off

condition

until

the

temperature on die falls 30℃ below the thermal

protection trigger point.

After the system enters into fault latch condition, the

VCC voltage will fall until it reaches UVLO threshold.

Then the system will re-start again. If the fault

condition is removed, the system will work normally.

PCB Layout

The following guidelines should be followed in

BP3309 PCB layout:

Bypass Capacitor

The bypass capacitor on ST and VCC pin should be as

close as possible to the respective pins.

Ground Path

The power ground path for current sense should be

short, and the power ground path should be separated

from small signal ground path before the negative

node of the bus capacitor.

The Area of Power Loop

The area of main current loop should be as small as

possible to reduce EMI radiation, such as the

primary current loop, the snubber circuit and the

secondary rectifying loop.

FB Pin

The feedback resistor divider should be as close as

possible to the FB pin and the node must keep away

from dynamic node of the transformer.

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