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M68HC05 датащи(PDF) 13 Page - Freescale Semiconductor, Inc |
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M68HC05 датащи(HTML) 13 Page - Freescale Semiconductor, Inc |
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13 / 302 page ![]() MC68HC05B6 Rev. 4.1 Freescale v TABLE OF CONTENTS Paragraph Number Page Number TABLE OF CONTENTS 10 CPU CORE AND INSTRUCTION SET 10.1 Registers .........................................................................................................10–1 10.1.1 Accumulator (A) .........................................................................................10–2 10.1.2 Index register (X)........................................................................................10–2 10.1.3 Program counter (PC) ................................................................................10–2 10.1.4 Stack pointer (SP) ......................................................................................10–2 10.1.5 Condition code register (CCR)...................................................................10–2 10.2 Instruction set ..................................................................................................10–3 10.2.1 Register/memory Instructions ....................................................................10–4 10.2.2 Branch instructions ....................................................................................10–4 10.2.3 Bit manipulation instructions ......................................................................10–4 10.2.4 Read/modify/write instructions ...................................................................10–4 10.2.5 Control instructions ....................................................................................10–4 10.2.6 Tables.........................................................................................................10–4 10.3 Addressing modes .........................................................................................10–11 10.3.1 Inherent....................................................................................................10–11 10.3.2 Immediate ................................................................................................10–11 10.3.3 Direct........................................................................................................10–11 10.3.4 Extended..................................................................................................10–12 10.3.5 Indexed, no offset.....................................................................................10–12 10.3.6 Indexed, 8-bit offset..................................................................................10–12 10.3.7 Indexed, 16-bit offset................................................................................10–12 10.3.8 Relative ....................................................................................................10–13 10.3.9 Bit set/clear ..............................................................................................10–13 10.3.10 Bit test and branch ...................................................................................10–13 11 ELECTRICAL SPECIFICATIONS 11.1 Absolute maximum ratings ..............................................................................11–1 11.2 DC electrical characteristics ............................................................................11–2 11.2.1 IDD trends for 5V operation ........................................................................11–3 11.2.2 IDD trends for 3.3V operation .....................................................................11–6 11.3 A/D converter characteristics...........................................................................11–8 11.4 Control timing ................................................................................................11–10 12 MECHANICAL DATA 12.1 MC68HC05B family pin configurations ............................................................12–1 12.1.1 52-pin plastic leaded chip carrier (PLCC) ..................................................12–1 12.1.2 64-pin quad flat pack (QFP) .......................................................................12–2 |
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