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AT89LP4052-20PI датащи(PDF) 58 Page - ATMEL Corporation |
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AT89LP4052-20PI датащи(HTML) 58 Page - ATMEL Corporation |
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58 / 90 page ![]() 58 3547F–MICRO–6/06 AT89LP2052/LP4052 22.4.1 Power-up Sequence Execute the following sequence to power-up the device before parallel programming. 1. Apply power between VCC and GND pins. 2. After V CC has settled, wait 10 µs and bring RST to “H”. 3. Wait 2 ms for the internal Power-on Reset to time out. 4. Bring P3.2 to “H” and then wait 10 µs. 5. Raise RST/V PP to 12V to enable the parallel programming modes. 6. After V PP has settled, wait an additional 10 µs before programming. Figure 22-5. Parallel Mode Power-up Operation 22.4.2 Power-down Sequence Execute the following sequence to power-down the device after parallel programming. 1. Tri-state P1. 2. Bring RST/V PP down from 12V to VCC and wait 10 µs. 3. Bring XTAL and P3.2 to “L”. 4. Bring RST to “L” and wait 10 µs. 5. Power off V CC. Figure 22-6. Parallel Mode Power-down Operation Note: The waveforms on this page are not to scale. VCC RST VIH VPP P3.2 XTAL1 HIGH Z P1 VCC RST VIH VPP P3.2 XTAL1 HIGH Z P1 |
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