AD8328

Rev. A | Page 12 of 20

INITIAL POWER-UP

When the supply voltage is first applied to the AD8328, the gain

of the amplifier is initially set to Gain Code 1. Since power is

first applied to the amplifier, the TXEN pin should be held low

(Logic 0) to prevent forward signal transmission. After power is

applied to the amplifier, the gain can be set to the desired level

by following the procedure provided in the SPI Programming

and Gain Adjustment section. The TXEN pin can then be

brought from Logic 0 to Logic 1, enabling forward signal

transmission at the desired gain level.

RAMP PIN AND BYP PIN FEATURES

The RAMP pin is used to control the length of the burst on and

off transients. By default, leaving the RAMP pin unconnected

results in a transient that is fully compliant with DOCSIS 2.0

Section 6.2.21.2, Spurious Emissions During Burst On/Off

Transients. DOCSIS requires that all between-burst transients

must be dissipated no faster than 2 μs; and adding capacitance

to the RAMP pin adds more time to the transient.

The BYP pin is used to decouple the output stage at midsupply.

Typically, for normal DOCSIS operation, the BYP pin should be

decoupled to ground with a 0.1 μF capacitor. However, in

applications that require transient on/off times faster than 2 μs,

smaller capacitors can be used, but it should be noted that the

BYP pin should always be decoupled to ground.

TRANSMIT ENABLE (TXEN) AND SLEEP

The asynchronous TXEN pin is used to place the AD8328 into

between-burst mode. In this reduced current state, the output

impedance of 75 Ω is maintained. Applying Logic 0 to the

TXEN pin deactivates the on-chip amplifier, providing a 97.8%

reduction in consumed power. For 5 V operation, the supply

current is typically reduced from 120 mA to 2.6 mA. In this

mode of operation, between-burst noise is minimized and high

input to output isolation is achieved. In addition to the TXEN

pin, the AD8328 also incorporates an asynchronous SLEEP pin,

which can be used to further reduce the supply current to

approximately 20 μA. Applying Logic 0 to the SLEEP pin places

the amplifier into SLEEP mode. Transitioning into or out of

SLEEP mode can result in a transient voltage at the output of

the amplifier.

DISTORTION, ADJACENT CHANNEL POWER, AND

DOCSIS

To deliver the DOCSIS required 58 dBmV of QPSK signal and

55 dBmV of 16 QAM signal, the PA is required to deliver up to

60 dBmV. This added power is required to compensate for

losses associated with the diplex filter or other passive components

that may be included in the upstream path of cable modems

or set-top boxes. It should be noted that the AD8328 was

characterized with a differential input signal. Figure 7 and

Figure 10 show the AD8328 second and third harmonic

distortion performance vs. the fundamental frequency for

various output power levels. These figures are useful for

determining the in-band harmonic levels from 5 MHz to

65 MHz. Harmonics higher in frequency (above 42 MHz for

DOCSIS and above 65 MHz for EuroDOCSIS) are sharply

attenuated by the low-pass filter function of the diplexer.

Another measure of signal integrity is adjacent channel power,

commonly referred to as ACP. DOCSIS 2.0, Section 6.2.21.1.1

states, “Spurious emissions from a transmitted carrier may

occur in an adjacent channel that could be occupied by a carrier

of the same or different symbol rates.” Figure 9 shows the

measured ACP for a 60 dBmV QPSK signal taken at the output

of the AD8328 evaluation board. The transmit channel width

and adjacent channel width in Figure 9 correspond to the

symbol rates of 160 kSym/s. Table 6 shows the ACP results for

the AD8328 driving a QPSK 60 dBmV signal for all conditions

in DOCSIS Table 6-9, Adjacent Channel Spurious Emissions.

NOISE AND DOCSIS

At minimum gain, the AD8328 output noise spectral density is

1.2 nV/√Hz measured at 10 MHz. DOCSIS Table 6-10, Spurious

Emissions in 5 MHz to 42 MHz, specifies the output noise for

various symbol rates. The calculated noise power in dBmV for

160 kSym/s is

dBmV

66.4

60

kHz

160

Hz

nV

1.2

log

20

2

−

=

+

⎥

⎥

⎦

⎤

⎢

⎢

⎣

⎡

⎟⎟

⎟

⎠

⎞

⎜⎜

⎜

⎝

⎛

×

⎟

⎠

⎞

⎜

⎝

⎛

×

(1)

Comparing the computed noise power of −66.4 dBmV to the

+8 dBmV signal yields −74.4 dBc, which meets the required

level set forth in DOCSIS Table 6-10. As the AD8328 gain is

increased above this minimum value, the output signal

increases at a faster rate than the noise, resulting in a signal-

to-noise ratio that improves with gain. In transmit disable

mode, the output noise spectral density is 1.1 nV/√Hz, which

results in −67 dBmV when computed over 160 kSym/s. The

noise power was measured directly at the output of the

AD8328AR-EVAL board.

EVALUATION BOARD FEATURES AND OPERATION

The AD8328 evaluation board and control software can be used

to control the AD8328 upstream cable driver via the parallel

port of a PC. A standard printer cable connected to the parallel

port of the PC is used to feed all the necessary data to the AD8328

using the Windows®-based control software. This package

provides a means of controlling the gain and the power mode of

the AD8328. With this evaluation kit, the AD8328 can be evaluated

in either a single-ended or differential input configuration. See

Figure 26 for a schematic of the evaluation board.