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WM8955BLGECO/V датащи(PDF) 28 Page - Wolfson Microelectronics plc |
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WM8955BLGECO/V датащи(HTML) 28 Page - Wolfson Microelectronics plc |
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28 / 44 page ![]() WM8955BL Production Data w PD Rev 4.1 February 2007 28 Figure 16 DSP Mode Audio Interface (Mode B; LRP = 1) AUDIO INTERFACE CONTROL The register bits controlling audio format, word length and master / slave mode are summarised below. REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION 1:0 FORMAT 10 Audio Data Format Select 11 = DSP Mode 10 = I 2S Format 01 = Left justified 00 = Right justified 3:2 WL 10 Audio Data Word Length 11 = 32 bits (see Note) 10 = 24 bits 01 = 20 bits 00 = 16 bits 4 LRP 0 I 2S, LJ, RJ Formats 1: Invert LRCLK polarity 0: Normal LRCLK polarity DSP Format 1: MSB available on 1 st BCLK rising edge after LRC rising edge 0: MSB available on 2 nd BCLK rising edge after LRC rising edge 5 LRSWAP 0 Swap Left and Right Channels 0: No swap (L to L, R to R) 1: Swap (L to R, R to L) 6 MS 0 Master / Slave Mode Control 1: Master Mode 0: Slave Mode R7 (07h) Digital Audio Interface Format 7 BCLKINV 0 BCLK Invert 1: BCLK inverted 0: BCLK not inverted Table 18 Audio Data Format Control Note: Right Justified mode does not support 32-bit data. If WL=11 in Right justified mode, the actual word length will be 24 bits. |
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