WM8734 datasheet(34/46 Pages) WOLFSON

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WM8734

Production Data

PD Rev 4.1 November 2006

A stop condition is defined when there is a low to high transition on SDIN while SCLK is high. If a

start or stop condition is detected out of sequence at any point in the data transfer then the device

will jump to the idle condition.

After receiving a complete address and data sequence the WM8734 returns to the idle state and

waits for another start condition. Each write to a register requires the complete sequence of start

condition, device address and R/W bit followed by the 16 register address and data bits.

Note that the 16 bit control word is made up of 7 address bits, B[15:9], and 9 data bits, B[8:0].

These are transmitted as 2 blocks of 8 bits. The first block contains 7 address bits and the data

HSB. The second block contains the 8 data LSBs.

POWER DOWN MODES

The WM8734 contains power conservation modes in which various circuit blocks may be safely

powered down in order to conserve power. This is software programmable as shown in the table

below.

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

LINEINPD

Line Input Power Down

1 = Enable Power Down

0 = Disable Power Down

ADCPD

ADC Power Down

1 = Enable Power Down

0 = Disable Power Down

DACPD

DAC Power Down

1 = Enable Power Down

0 = Disable Power Down

OUTPD

Line Output Power Down

1 = Enable Power Down

0 = Disable Power Down

0000110

Power Down

Control

POWEROFF

Power Off Device

1 = Device Power Off

0 = Device Power On

Table 18 Power Conservation Modes Software Control

When writing to the powerdown register bits 1,5 and 6 should be set to ‘1’.

The power down control can be used to either a) permanently disable functions when not required in

certain applications or b) to dynamically power up and down functions depending on the operating

mode, e.g.: during playback or record. Please follow the special instructions below if dynamic

implementations are being used.

LINEINPD: Simultaneously powers down both the Line Inputs. This can be done dynamically without

any audible effects either on the ADC or to the Line Outputs in Bypass mode. This is of use when the

device enters Playback, Pause or Stop modes or the Microphone input has been selected.

ADCPD: Powers down the ADC and ADC Filters. If this is done dynamically then audible pops will

result if any signals were present through the ADC. To overcome this whenever the ADC is to be

powered down, either mute the Microphone Input (MUTEIN) or MUTELINEIN, then change ADCPD.

This is of use when the device enters Playback, Pause or Stop modes regardless of whether

Microphone or Line Inputs are selected.

DACPD: Powers down the DAC and DAC Digital Filters. If this is done dynamically then audible pops

will result unless the following guidelines are followed. In order to prevent pops, the DAC should first

be soft-muted (DACMU), the output should then be de-selected from the line and headphone output

(DACSEL), then the DAC powered down (DACPD). This is of use when the device enters Record,

Pause, Stop or Bypass modes.

The device can be put into a standby mode (STANDBY) by powering down all the audio circuitry

under software control as shown in Table 18. Provision has been made to independently power off

these areas according to Table 19.

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