RNBD451 datasheet(21/67 Pages) MICROCHIP

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RNBD451

Electrical Characteristics

and its subsidiaries

Advance Information Data Sheet

DS70005514A-page 21

Figure 4-10. XOSC32 Block Diagram

XTAL

Notes:

VDDIO = VDDANA = 3.3V.

This is for guidance only. A major component of crystal start-up time is based on the second party crystal MFG

parasitic that is outside the scope of this specification. If this is a major concern, the customer might need to

characterize this based on their design choices.

The test conditions for crystal load capacitor calculation are as follows:

– Standard PCB trace capacitance = 1.5 pF per 12.5 mm (0.5 inches) (in other words, PCB STD TRACE W

= 0.175 mm, H = 36 μm, T = 113 μm)

– Xtal PCB capacitance typical; therefore, ~= 2.5 pF for a tight PCB xtal layout

– For CXIN and CXOUT within 4 pF of each other, assume CXTAL_EFF = ((CXIN / 2)

– Note: Averaging CXIN and CXOUT will affect the final calculated CLOAD value by less than the

tolerance of the capacitor selection.

Equation 4-1. Equation 1:

MFG CLOADSpec= CXIN+ C1 * CXOUT + C2 /CXIN+ C1+C2+CXOUT +estimated

oscillatorPCBstraycapacitance

Assuming C1 = C2 and CXin ~= CXout, the formula can be further simplified and restated to solve for C1 and

C2 by:

Equation 4-2. Equation 2 (In other words: Simplified Equation 1)

C1 = C2 = 2* MFG CLOADSpec −CXTAL_EFF− 2* PCB capacitance

Example:

• XTAL Mfg CLOAD Data Sheet Spec = 12 pF

• PCB XTAL trace Capacitance = 2.5 pF

• CXIN pin = 6.5 pF, CXOUT pin = 4.5 pF therefore CXTAL_EFF = ((CXIN / 2)

CXTAL_EFF = ((6.5 + 4.5)/2) = 5.5 pF

C1 = C2 = ((2 * MFG Cload spec) - CXTAL_EFF - (2 * PCB capacitance))

C1 = C2 = (24 - 5.5 - (2 * 2.5))

C1 = C2 = (24 - 5.5 - 5)

C1 = C2 = 13.5 pF (Always rounded down)

C1 = C2 = 13 pF (in other words, for hypothetical example crystal external load capacitors)

User C1 = C2 = 13 pF ≤ CLOAD_X32 (max.) spec

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