PDSP16350

7

N

T

A

B

AB

Device Reset

Apply first data

First Result Available

C

PI

Apply phase

increment

16 bit

Cordic

Sin / Cos

Generator

A/D

Converter

Phase

Increment

Value

Analog

Data

D17:0

D33:18

PDSP

16350

PDSP16256

EPROM

I

Q

O/P

DATA

Fig. 6 Amplitude Modulation (34bit frequency accuracy)

Fig. 5 IQ Split Function

Fig. 4 shows the operation of the device when loading the

phase increment directly from the DIN bus. First the device

must be reset then data is presented on each clock cycle. The

amplitude modulation value is presented on the most signifi-

cant 16 bits while the phase increment is presented on the

least significant 18 bits. The first valid result is obtained after

31 cycles. (In this mode the least significant 16 bits of the

phase increment register remain low).

Fig.6 shows the operation of the device when using the full

34 bits of the phase increment register. First the device must

be reset, then the full 34 bits of the phase increment register

are loaded from the DIN bus by taking signal JUMP high

before the rising edge of the clock. Following this new data can

be presented on each cycle of the clock. The amplitude

modulation value is presented on the most significant 16 bits

while the phase increment is presented on the least significant

18 bits. The least significant 16

bits of the phase increment reg-

ister remain fixed at the value

loaded using JUMP. The first

valid result is obtained after 31

cycles. When using JUMP to

load the phase increment regis-

ter, normal operation cannot be

maintained. This is because the

amplitude modulation value

normally presented on the most

significant 16 bits of the DIN bus

are replaced by part of the new

phase increment value.

The AM mode is useful in

systems requiring frequency

sweeps. By varying the ampli-

tudes at different frequencies, it

is possible to compensate for

the analog gain characteristics

of amplifiers further along in the

system.

It can also be used to generate the in-phase and quadra-

ture components of an analog waveform, which has been

digitized and which is to be processed using complex tech-

niques. Such a quadrature heterodyning system, alternatively

known as an IQ splitter, is shown in Fig. 5.

The output from an A/D converter drives the D33:18 inputs

of the PDSP16350. If all sixteen inputs are not required, the

unused least significant bits should be tied to ground, and the

more significant inputs connected to the A/D converter. Multi-

plying an input signal with a local oscillator in this manner

produces both sum and difference components. The former

can be removed by using the PDSP16256 Programmable FIR

Filter.