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MP2172C датащи(PDF) 3 Page - MPS Industries, Inc.

номер детали MP2172C
подробное описание детали  5.5V, 2A, Sync Step-Down Converter with Output Discharge in UTQFN Package
PDF  18 Pages
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производитель  MPSIND [MPS Industries, Inc.]
домашняя страница  http://www.mpsind.com/index.html
Logo MPSIND - MPS Industries, Inc.

MP2172C датащи(HTML) 3 Page - MPS Industries, Inc.

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MP2172C – 2A, SYNCHRONOUS STEP-DOWN SWITCHER
MP2172C Rev.1.0
www.MonolithicPower.com
3
4/22/2019
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2019 MPS. All Rights Reserved.
ABSOLUTE MAXIMUM RATINGS (1)
Supply voltage (VIN) ..................................... 6.5V
VSW ................................ -0.3V (-5V for <10ns) to
6.5V (10V for <10ns)
All other pins ................................. -0.3V to 6.5 V
Junction temperature ................................ 150°C
Lead temperature...................................... 260°C
Continuous power dissipation (TA = +25°C)
UTQFN....................................................2W (2) (4)
Storage temperature.................-65°C to +150°C
Recommended Operating Conditions (3)
Supply voltage (VIN) ...................... 2.38V to 5.5V
Operating junction temp (TJ).....-40°C to +125°C
Thermal Resistance
θJA
θJC
UTQFN (1.2mmx1.6mm)
EV2172C-QFU-00A (4) ........... 65 ...... 30 ...°C/W
JESD51-7 (5) .......................... 173 .... 127 ..°C/W
Notes:
1) Exceeding these ratings may damage the device.
2) The maximum allowable power dissipation is a function of the
maximum junction temperature TJ (MAX), the junction-to-
ambient thermal resistance θJA, and the ambient temperature
TA. The maximum allowable continuous power dissipation at
any ambient temperature is calculated by PD (MAX) = (TJ
(MAX)-TA)/θJA. Exceeding the maximum allowable power
dissipation produces an excessive die temperature, causing
the regulator to go into thermal shutdown. Internal thermal
shutdown circuitry protects the device from permanent
damage.
3) The device is not guaranteed to function outside of its
operating conditions.
4) Measured on EV2172C-Q-00A demo board, 2-layer PCB.
5) Measured onJESD51-7, 4-layer PCB.
note 5) The value of θJA given in this table is only valid for
comparison with other packages and cannot be used for
design purposes. These values are calculated in accordance
with JESD51-7, and simulated on a specified JEDEC board.
They do not represent the performance obtained in an actual
application
.



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