DAP018 datasheet(13/28 Pages) ONSEMI

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DAP018A/B/C/D/F

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Application Information

Introduction

SpeedKing II implements a standard current mode

architecture where the switch−off event is dictated by the

peak current setpoint. This component represents the ideal

candidate where low part−count is the key parameter,

particularly in low−cost ac−dc adapters, open−frame power

supplies etc. Thanks to its High−Voltage technology, the

DAP−018X incorporates all the necessary components

normally needed in today modern power supply designs,

bringing several enhancements such as an adjustable EMI

jittering and a fault timer...

• Current−mode operation with internal ramp

compensation: implementing peak current mode

control, the DAP−018X offers an internal ramp

compensation signal that can easily by summed up to

the sensed current. Subharmonic oscillations can thus

be fought via the inclusion of a simple resistor in series

with the current−sense information.

• Internal OPP: by routing a portion of the negative

voltage present during the on−time on the auxiliary

winding to the dedicated OPP pin, the user has a simple

and non−dissipative option to alter the maximum peak

current setpoint as the bulk voltage increases. If the pin

is grounded, no OPP compensation occurs. If the pin

receives a negative voltage down to –300 mV, then a

peak current reduction down to 40% typical can be

achieved. For an improved performance, the maximum

voltage excursion on the sense resistor is limited to 0.8 V.

• Internal high−voltage startup switch: reaching a low

no−load standby power represents a difficult exercise

when the controller requires an external, lossy, resistor

connected to the bulk capacitor. Thanks to an internal

logic, the controller disables the high−voltage current

source after startup which no longer hampers the

consumption in no−load situations.

• EMI jittering: a dedicated pin offers the ability to vary

the pace at which the oscillator frequency is modulated.

This helps spreading out energy in conducted noise

analysis. To avoid modulation conflicts, the jittering

will be disabled as soon as the controller enters

frequency folback (light load conditions).

• Frequency foldback capability: a continuous flow of

pulses in not compatible with no−load standby power

requirements. The controller observes the feedback pin

and when it reaches a level determined by pin 5, the

peak current freezes. The oscillator then starts to reduce

its switching frequency as the feedback level continues

to decrease. It can decrease down to 26 kHz (typical).

At this point, if the power continues to drop, the

controller enters classical skip−cycle mode at a peak

current set by pin 5 level. The point at which the

foldback occurs can be adjusted to any level, we

recommend to put it in the vicinity of 1 V or slightly

above.

• Bias reduction: the controller detects that standby

mode is entered by monitoring the feedback pin level.

When this occurs, the circuit significantly reduces its

bias current by shutting down un−necessary blocks.

This improves the standby power further.

• Brown−out: versions B & D include a brown−out (BO)

detector. When the voltage sensed on this pin is below

the BO level, the controller does not operate. When the

voltage reaches the threshold, the controller pulses and

open the internal hysteresis current source. By

connecting a divider network between the bulk voltage

and the BO pin, the designer has the flexibility to adjust

the turn−on and turn−off levels. For versions A & C,

the brown−out circuitry is disabled and pin 11 is not

internally connected.

• Internal soft−start: a soft−start precludes the main

power switch from being stressed upon start−up. In this

controller, the soft−start is internally fixed to 5 ms. The

soft−start is activated when a) a new startup sequence

occurs – fresh startup or during an auto−recovery

hiccup b) when the controller recovers from a

brown−out condition (B & D versions).

• OVP input: the Speedking II includes a latch input that

can be used to sense an overvoltage condition on the

adapter. If this pin is brought higher than the internal

reference voltage Vlatch, then the circuit permanently

latches off. The VCC pin swings up and down, keeping

the controller latched. The latch reset occurs when

a) the user disconnects the adapter from the mains and

lets the VCC falls below the VCCreset value b) for

versions B & D, if the internal BO circuitry senses a

bulk / mains reset, then the controller is also reset. In

this case, if the controller is within a hiccup cycle: the

hiccup cycle is immediately reset and driving pulses

only re−appear on the output when VCC reaches

VCC(on).

• OTP input: the controller incorporates an Over

Temperature Protection circuitry (OTP) which allows

the direct connection of a Negative Temperature

Coefficient (NTC) sensor from pin 12 to GND. When

the temperature increases, the NTC resistor falls down.

When the NTC reaches a 8.8 k

W value (T = 110°C), the

voltage developed across its terminal is VOTP. The

internal comparator trips and latches−off the part. Reset

occurs in similar conditions as described in the OVP

section.

• Short−circuit protection: short−circuit and especially

over−load protection are difficult to implement when a

strong leakage inductance between auxiliary and power

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