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RT9758 датащи(PDF) 54 Page - Richtek Technology Corporation

номер детали RT9758
подробное описание детали  High Voltage Smart Cap Divider and Direct Charge Charger
PDF  61 Pages
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производитель  RICHTEK [Richtek Technology Corporation]
домашняя страница  http://www.richtek.com
Logo RICHTEK - Richtek Technology Corporation

RT9758 датащи(HTML) 54 Page - Richtek Technology Corporation

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RT9758
Copyright © 2023 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
DS9758-03
May 2023
54
Thermal Considerations
The junction temperature should never exceed the
absolute maximum junction temperature TJ(MAX), listed
under Absolute Maximum Ratings, to avoid permanent
damage to the device. The maximum allowable power
dissipation depends on the thermal resistance of the IC
package, the PCB layout, the rate of surrounding airflow,
and the difference between the junction and ambient
temperatures. The maximum power dissipation can be
calculated using the following formula :
PD(MAX) = (TJ(MAX) - TA) /
JA
where TJ(MAX) is the maximum junction temperature, TA
is the ambient temperature, and
JA is the junction-to-
ambient thermal resistance.
For continuous operation, the maximum operating
junction temperature indicated under Recommended
Operating Conditions is 125°C. The junction-to-ambient
thermal resistance,
JA, is highly package dependent.
For a WL-CSP-36B 2.74x2.84 (BSC) package, the
thermal resistance,
JA, is 34.7°C/W on a standard
JEDEC 51-7 high effective-thermal-conductivity four-
layer test board. The maximum power dissipation at TA
= 25°C can be calculated as below :
PD(MAX) = (125°C - 25°C) / (34.7°C/W) = 2.88W for a
WL-CSP-36B 2.74x2.84 (BSC) package.
The maximum power dissipation depends on the
operating ambient temperature for the fixed TJ(MAX) and
the thermal resistance,
JA. The derating curves in
Figure 15 allows the designer to see the effect of rising
ambient
temperature
on
the
maximum
power
dissipation.
Figure 15. Derating Curve of Maximum Power
Dissipation
Layout Considerations
The RT9758 layout guidelines are recommended as
below :
Place low ESR bypass capacitor to GND for
WRX_IN/VBUS/VOUT pin. The bypass capacitor
needs to be placed as close as possible to RT9758.
The capacitor of BST/CFH should be placed as close
as possible to RT9758.
Place flying caps with the RT9758 on same layer.
The flying caps should be placed as close as
possible to the RT9758. The path of flying caps
should be as small as possible.
The WRX_IN, VBUS and VOUT traces should be as
wide as possible to accommodate high charge
current.
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
0
25
50
75
100
125
Ambient Temperature (°C)
Four-Layer PCB



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