RT6318B datasheet(17/25 Pages) RICHTEK

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RT6318B/C

DS6318B/C-01 December 2021

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is a registered trademark of Richtek Technology Corporation.

OUT

V(V

)





 

Once an inductor value is chosen, the ripple current (

ΔIL)

is calculated to determine the required peak inductor

current.











OUT

L(PEAK)

OUT(MAX)

V(V

)

and

To guarantee the required output current, the inductor

needs a saturation current rating and a thermal rating that

exceeds IL(PEAK). These are minimum requirements. To

maintain control of inductor current in overload and short-

circuit conditions, some applications may desire current

ratings up to the current limit value. However, the IC's

output under-voltage shutdown feature make this

unnecessary for most applications.

For best efficiency, choose an inductor with a low DC

resistance that meets the cost and size requirements.

For low inductor core losses some type of ferrite core is

usually best and a shielded core type, although possibly

larger or more expensive, will probably give fewer EMI

and other noise problems.

Input Capacitor Selection

High quality ceramic input decoupling capacitor, such as

X5R or X7R, with values greater than 20

μF are

recommended for the input capacitor. The X5R and X7R

ceramic capacitors are usually selected for power regulator

is generally flexible and is ultimately chosen to obtain the

best mix of cost, physical size, and circuit efficiency.

Lower inductor values benefit from reduced size and cost

and they can improve the circuit’s transient response,

but they increase the inductor ripple current and output

voltage ripple and reduce the efficiency due to the resulting

higher peak currents. Conversely, higher inductor values

increase efficiency, but the inductor will either be physically

larger or have higher resistance since more turns of wire

are required and transient response will be slower since

more time is required to change current (up or down) in

the inductor. Calculate the approximate inductor value by

selecting the input and output voltages, the switching

frequency (fSW), the maximum output current (IOUT(MAX))

and estimating a

ΔIL as some percentage of that current.

capacitors because the dielectric material has less

capacitance variation and more temperature stability.

Voltage rating and current rating are the key parameters

when selecting an input capacitor. Generally, selecting an

input capacitor with voltage rating 1.5 times greater than

the maximum input voltage is a conservatively safe design.

The input capacitor is used to supply the input RMS

current, which can be calculated using the following

equation :

OUT

RMS

OUT

I(1

) I

















The next step is to select a proper capacitor for RMS

current rating. One good design uses more than one

capacitor with low Equivalent Series Resistance (ESR) in

parallel to form a capacitor bank. The input capacitance

value determines the input ripple voltage of the regulator.

The input voltage ripple can be approximately calculated

using the following equation :

OUT

V(1

)





 



The typical operating circuit is recommended to use two

μF low ESR ceramic capacitors on the input.

Output Capacitor Selection

The IC is optimized for ceramic output capacitors and best

performance will be obtained by using them. The total

output capacitance value is usually determined by the

desired output voltage ripple level and transient response

requirements for sag (undershoot on positive load steps)

and soar (overshoot on negative load steps).

Output ripple at the switching frequency is caused by the

inductor current ripple and its effect on the output

capacitor's ESR and stored charge. These two ripple

components are called ESR ripple and capacitive ripple.

Since ceramic capacitors have extremely low ESR and

relatively little capacitance, both components are similar

in amplitude and both should be considered if ripple is

critical.

RIPPLE

RIPPLE(ESR)

RIPPLE(C)

RIPPLE(ESR)

ESR

RIPPLE(C)

OUT



 







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