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M25P64-VMF6TP датащи(PDF) 24 Page - STMicroelectronics |
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M25P64-VMF6TP датащи(HTML) 24 Page - STMicroelectronics |
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24 / 49 page ![]() Instructions M25P64 24/49 6.2 Write Disable (WRDI) The Write Disable (WRDI) instruction (Figure 9) resets the Write Enable Latch (WEL) bit. The Write Disable (WRDI) instruction is entered by driving Chip Select (S) Low, sending the instruction code, and then driving Chip Select (S) High. The Write Enable Latch (WEL) bit is reset under the following conditions: ● Power-up ● Write Disable (WRDI) instruction completion ● Write Status Register (WRSR) instruction completion ● Page Program (PP) instruction completion ● Sector Erase (SE) instruction completion ● Bulk Erase (BE) instruction completion Figure 9. Write Disable (WRDI) instruction sequence C D AI03750D S Q 2 1 34567 High Impedance 0 Instruction |
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