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UPD16682AP датащи(PDF) 21 Page - Renesas Technology Corp |
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UPD16682AP датащи(HTML) 21 Page - Renesas Technology Corp |
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21 / 58 page ![]() Data Sheet S14402EJ1V0DS 19 µµµµPD16682A 6.5 Display Data Latch Circuit The display data latch circuit is used for temporary storage of display data that has been output to the LCD driver circuit from the display data RAM. The commands that are used to set normal/inverted display modes, display ON/OFF status, and display all ON/OFF status are commands that control data in this latch so that there is no modification of the data in the display data RAM. 7. OSCILLATION CIRCUIT This is a CR-type oscillation circuit that generates the display clock. The oscillation circuit is valid only when CLS = H. When CLS = L, oscillation is stopped and the display clock is input via the CL pin. 8. DISPLAY TIMING GENERATOR The display timing generator generates timing signals from the display clock to the line address circuit and the display data latch circuit. Display data is latched into the display data latch circuit in synch with the display clock and is output via segment driver output pins. Reading of the display data is completely independent of the CPU’s accessing of the display data RAM. Consequently, there are no adverse effects (such as flicker) on the LCD panel even when the display data RAM is accessed asynchronously in relation to the LCD contents. The internal common timing and LCD’s AC conversion signal (FR) are both generated from the display clock. As is shown in Figure 8–1, a drive waveform based on the two-frame AC drive method is generated for the LCD driver circuit. If a multiple set of µPD16682A chips is used, the display timing signals (FR, CL, and /DOF) for the slave side must be supplied from the master side. Operation Mode FR CL /DOF Master (M,/S = H) On-chip oscillation circuit is valid (CLS = H) Output Output Output On-chip oscillation circuit is invalid (CLS = L) Output Input Output Slave (M,/S = L) On-chip oscillation circuit is invalid (CLS = H) Input Input Input On-chip oscillation circuit is invalid (CLS = L) Input Input Input |
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