HT48R02 datasheet(9/38 Pages) HOLTEK

9 / 38 page

HT48R01/HT48R02/HT48R03

Rev. 1.00

December 20, 2006

S p e c i a l P u r p o s e

D a t a M e m o r y

0 0 H

0 1 H

0 2 H

0 3 H

0 4 H

0 5 H

0 6 H

0 7 H

0 8 H

0 9 H

0 A H

0 B H

0 C H

0 D H

0 E H

0 F H

1 0 H

1 1 H

1 2 H

1 3 H

1 4 H

1 5 H

1 6 H

1 7 H

1 8 H

1 9 H

1 A H

1 B H

1 C H

1 D H

1 E H

1 F H

: U n u s e d ,

r e a d a s " 0 0 "

G e n e r a l P u r p o s e

D a t a M e m o r y

( 6 4 B y t e s )

5 F H

2 0 H

I n d i r e c t A d d r e s s i n g R e g i s t e r 0

M P 0

I n d i r e c t A d d r e s s i n g R e g i s t e r 1

M P 1

A C C

P C L

T B L P

T B L H

W D T S

S T A T U S

I N T C 0

T M R 0

T M R 0 C

P A

P A C

P A P U

P A W K

C T R L

W C O N

H T 4 8 R 0 1

S p e c i a l P u r p o s e

D a t a M e m o r y

0 0 H

0 1 H

0 2 H

0 3 H

0 4 H

0 5 H

0 6 H

0 7 H

0 8 H

0 9 H

0 A H

0 B H

0 C H

0 D H

0 E H

0 F H

1 0 H

1 1 H

1 2 H

1 3 H

1 4 H

1 5 H

1 6 H

1 7 H

1 8 H

1 9 H

1 A H

1 B H

1 C H

1 D H

1 E H

1 F H

: U n u s e d ,

r e a d a s " 0 0 "

G e n e r a l P u r p o s e

D a t a M e m o r y

( 9 6 B y t e s )

7 F H

2 0 H

I n d i r e c t A d d r e s s i n g R e g i s t e r 0

M P 0

I n d i r e c t A d d r e s s i n g R e g i s t e r 1

M P 1

A C C

P C L

T B L P

T B L H

W D T S

S T A T U S

I N T C 0

T M R 0

T M R 0 C

T M R 1

T M R 1 C

P A

P A C

P A P U

P A W K

C T R L

W C O N

H T 4 8 R 0 2

S p e c i a l P u r p o s e

D a t a M e m o r y

0 0 H

0 1 H

0 2 H

0 3 H

0 4 H

0 5 H

0 6 H

0 7 H

0 8 H

0 9 H

0 A H

0 B H

0 C H

0 D H

0 E H

0 F H

1 0 H

1 1 H

1 2 H

1 3 H

1 4 H

1 5 H

1 6 H

1 7 H

1 8 H

1 9 H

1 A H

1 B H

1 C H

1 D H

1 E H

1 F H

: U n u s e d ,

r e a d a s " 0 0 "

G e n e r a l P u r p o s e

D a t a M e m o r y

( 1 6 0 B y t e s )

B F H

2 0 H

I n d i r e c t A d d r e s s i n g R e g i s t e r 0

M P 0

I n d i r e c t A d d r e s s i n g R e g i s t e r 1

M P 1

A C C

P C L

T B L P

T B L H

W D T S

S T A T U S

I N T C 0

T M R 0

T M R 0 C

T M R 1

T M R 1 C

P A

P A C

P A P U

P A W K

C T R L

W C O N

H T 4 8 R 0 3

RAM Mapping

Status Register

- STATUS

This 8-bit register (0AH) contains the zero flag (Z), carry

flag (C), auxiliary carry flag (AC), overflow flag (OV),

power down flag (PDF), and watchdog time-out flag

(TO). It also records the status information and controls

the operation sequence.

With the exception of the TO and PDF flags, bits in the

status register can be altered by instructions like most

other registers. Any data written into the status register

will not change the TO or PDF flag. In addition opera-

tions related to the status register may give different re-

sults from those intended. The TO flag can be affected

only by system power-up, a WDT time-out or executing

the

²CLR WDT² or ²HALT² instruction. The PDF flag

can be affected only by executing the

²HALT² or ²CLR

WDT

² instruction or a system power-up.

The Z, OV, AC and C flags generally reflect the status of

the latest operations.

Bit No.

Label

Function

C is set if the operation results in a carry during an addition operation or if a borrow does not

take place during a subtraction operation; otherwise C is cleared. C is also affected by a rotate

through carry instruction.

AC is set if the operation results in a carry out of the low nibbles in addition or no borrow from

the high nibble into the low nibble in subtraction; otherwise AC is cleared.

Z is set if the result of an arithmetic or logic operation is zero; otherwise Z is cleared.

OV is set if the operation results in a carry into the highest-order bit but not a carry out of the

highest-order bit, or vice versa; otherwise OV is cleared.

PDF

PDF is cleared by system power-up or executing the

²CLR WDT² instruction.

PDF is set by executing the

²HALT² instruction.

TO is cleared by system power-up or executing the

²CLR WDT² or ²HALT² instruction.

TO is set by a WDT time-out.

6~7

Unused bit, read as

²0²

Status (0AH) Register

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