Description of Control Register

Bit

Name

Function

D12

TEST 1

Test Mode: See Table 1.

D11

TEST 2

D10

TEST 3

D9

AUXILIARY

DATA SELECT

Set to 0 to select 3 wires serial data bus mode at the next pattern

Set to 1 to select 4 wires serial data bus mode at the next pattern

D8

REFOUT/3

Set to 0, MCUCLOCK frequency = OSC.OUT frequency / 4

Set to 1, MCUCLOCK frequency = OSC.OUT frequency / 3

D7

TXCE

TX Counter Enable bit: if set to 0, TX amplifier, counter and PFD will be in power

down mode and OUTTX pin will be set to 1.

D6

RXCE

RX Counter Enable bit: if set to 0, RX amplifier, counter and PFD will be in power

down mode and OUTRX pin will be set to 1.

D5

RCE

Reference Counter Enable bit: if set to 0, ref counter will be in power down mode.

D4

ARCE

Auxiliary Reference Counter Enable bit: if set to 0, AUX Ref counter will be in

power down mode

D3

MUX SELECT 1

Used to connect internally PFD inputs REFTX and REFRX to the chosen Ref

frequency output: see Table 2.

D2

MUX SELECT 2

D1

MUX SELECT 3

D0

MUX SELECT 4

Table 1.

TEST1

TEST2

TEST3

Status of output pin

OUTTX

Status of output pin

OUTRX

Status of TX and RX PFD

0

0

0

CONTROL BIT TXCE

CONTROL BIT RXCE

NORMAL OPERATION

0

0

1

INTERNAL POINT

REFTX

INTERNAL POINT

REFRX

TEST MODE NORMAL IUP

0

1

0

INTERNAL POINT

FINTX/N2

INTERNAL POINT

FINRX/N1

TEST MODE NORMAL IDOWN

0

1

1

INTERNAL POINT

FINTX/N2

INTERNAL POINT

FINRX/N1

TEST MODE I LEAKAGE

1

0

0

CONTROL BIT TXCE

CONTROL BIT RXCE

OPERATION WITH INCREASED

IUP AND IDOWN

1

0

1

INTERNAL POINT

REFTX

INTERNAL POINT

REFRX

TEST MODE INCREASED IUP

1

1

0

INTERNAL POINT

FINTX/N2

INTERNAL POINT

FINRX/N1

TEST MODE INCREASED IDOWN

1

1

1

INTERNAL POINT

FINTX/N2

INTERNAL POINT

FINRX/N1

TEST MODE I LEAKAGE

ST7162

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