µPD61P24

26

DC Programming Characteristics (TA = 25

±5 °C, VDD = 6.0±0.25 V, VPP = 12.5±0.5 V)

Parameter

Symbol

Conditions

MIN.

TYP.

MAX.

Unit

High-level input voltage

VIH1

Other than CLK

0.7 VDD

VDD

V

VIH2

CLK

VDD–0.5

VDD

V

Low-level input voltage

VIL1

Other than CLK

0

0.3 VDD

V

VIL2

CLK

0

0.4

V

Input leakage current

ILI

VIN = VIL or VIH

10

µA

High-level output voltage

VOH

IOH = –1 mA

VDD–1.0

V

Low-level output voltage

VOL

IOL = 1.6 mA

0.4

V

VDD supply current

IDD

30

mA

VPP supply current

IPP

MD0 = VIL, MD1 = VIH

30

mA

Cautions 1. Keep VPP to within +13.5 V including the overshoot.

2. Apply VDD before VPP, and turn it off after VPP.

AC Programming Characteristics (TA = 25

±5 °C, VDD = 6.0±0.25 V, VPP = 12.5±0.5 V)

Parameter

Symbol

Note 1

Conditions

MIN.

TYP.

MAX.

Unit

Address setup timeNote 2 (vs. MD0

↓)tAS

tAS

2

µs

MD1 setup time (vs. MD0

↓)tM1S

tOES

2

µs

Data setup time (vs. MD0

↓)tDS

tDS

2

µs

Address hold timeNote 2 (vs. MD0

↑)tAH

tAH

2

µs

Data hold time (vs. MD0

↑)tDH

tDH

2

µs

MD0

↑→ data output float delay time

tDF

tDF

0

130

ns

VPP setup time (vs. MD3

↑)tVPS

tVPS

2

µs

VDD setup time (vs. MD3

↑)tVDS

tVCS

2

µs

Initial program pulse width

tPW

tPW

0.95

1.0

1.05

ms

Additional program pulse width

tOPW

tOPW

0.95

21.0

ms

MD0 setup time (vs. MD1

↑)tM0S

tCES

2

µs

MD0

↓→ data output delay time

tDV

tDV

MD0 = MD1 = VIL

1

µs

MD1 hold time (vs. MD0

↑)tM1H

tOEH

tM1H + tM1R

≥ 50

µs2

µs

MD1 recovery time (vs. MD0

↓)tM1R

tOR

2

µs

Program counter reset time

tPCR

—10

µs

CLK input high-, low-level widths

tXH, tXL

—

0.125

µs

CLK input frequency

fX

—

4.19

MHz

Initial mode set time

tI

—2

µs

MD3 setup time (vs. MD1

↑)tM3S

—2

µs

MD3 hold time (vs. MD1

↓)tM3H

—2

µs

MD3 setup time (vs. MD0

↓)tM3SR

—

On reading program memory

2

µs

AddressNote 2

→ data output delay time

tDAD

tACC

On reading program memory

2

µs

AddressNote 2

→ data output hold time

tHAD

tOH

On reading program memory

0

130

ns

MD3 hold time (vs. MD0

↑)tM3HR

—

On reading program memory

2

µs

MD3

↓→ data output float delay time

tDFR

—

On reading program memory

2

µs

Reset setup time

tRES

10

µs

Notes 1. Corresponding symbols of

µPD27C256A (the µPD27C256A is a maintenance product).

2. The internal address signal is incremented by one at the falling edge of CLK input at the third clock.