2001 May 18

2

Philips Semiconductors

Product specification

N-channel enhancement mode

vertical D-MOS transistor

BSP89

FEATURES

• Direct interface to C-MOS, TTL,

etc.

• High-speed switching

• No secondary breakdown.

DESCRIPTION

N-channel enhancement mode

vertical D-MOS transistor in a

SOT223 package, intended for use as

a surface-mounted device in line

current interrupters in telephone sets

and for application in relay, high

speed and line transformer drivers.

PINNING - SOT223

PIN

DESCRIPTION

Code: BSP89

1

gate

2

drain

3

source

4

drain

QUICK REFERENCE DATA

SYMBOL

PARAMETER

MAX.

UNIT

VDS

drain-source voltage (DC)

240

V

VGSth

gate-source threshold voltage

2

V

ID

drain current (DC)

375

mA

RDSon

drain-source on-state resistance

5

Ω

Fig.1 Simplified outline (SOT223) and symbol.

handbook, halfpage

MAM109

4

12

3

Top view

s

d

g

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 60134).

Note

1. Transistor mounted on an epoxy printed circuit board, 40 x 40 x 1.5 mm, mounting pad for the drain tab minimum

6cm2.

SYMBOL

PARAMETER

CONDITIONS

MIN.

MAX.

UNIT

VDS

drain-source voltage (DC)

−

240

V

VGSO

gate-source voltage (DC)

open drain

−±20

V

ID

drain current (DC)

−

375

mA

IDM

peak drain current

−

1.5

A

Ptot

total power dissipation

Tamb ≤ 25 °C; note 1

−

1.5

W

Tstg

storage temperature

−55

+150

°C

Tj

junction temperature

−

150

°C