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BIPOLAR ANALOG INTEGRATED CIRCUIT

µPC4094

J-FET INPUT LOW-OFFSET DUAL OPERATIONAL AMPLIFIER

DATA SHEET

Document No. G13907EJ3V0DS00 (3rd edition)

Date Published March 2004 N CP(K)

Printed in Japan

The mark

shows major revised points.

1998

Dual operational amplifier

µPC4094 is a high-speed version of the µPC4092. NEC's unique high-speed PNP transistor (fT

= 300 MHz) in the output stage realizes a high slew rate of 25 V/

µs under voltage-follower conditions without an oscillation

problem. Zener-zap resistor trimming in the input stage produces excellent offset voltage and temperature drift

characteristics.

With AC performance characteristics that are two times better than conventional bi-FET operation amplifiers, the

µPC4094 is ideal for fast integrators, active filters, and other high-speed circuit applications.

FEATURES

•

Stable operation with 220 pF capacitive load

•

Low noise: en = 19 nV/

√Hz (TYP.)

•

Low input offset voltage and offset voltage

•

Output short circuit protection

±3 mV (MAX.)

•

High input impedance ... J-FET Input Stage

±7

µV/°C (TYP.) temperature drift

•

Internal frequency compensation

•

Very low input bias and offset currents

•

High slew rate: 25 V/

µs (TYP.)

ORDERING INFORMATION

Part Number

Package

µPC4094C

8-pin plastic DIP (7.62 mm (300) )

µPC4094G2

8-pin plastic SOP (5.72 mm (225) )

EQUIVALENT CIRCUIT (1/2 Circuit)

PIN CONFIGURATION

(Top View)

II

IN

Q1

Q2

Q4

Q5

Q8

D1

C1

Q10

V

+

V

−

OUT

Q9

Q7

Q6

Q3

TRIMMED

HIGH SPEED

PNP









PC4094C, 4094G2

1

1

2

3

4

8

7

6

5

V

+

OUT2

II2

IN2

+

−

II1

IN1

OUT1

V

−

2

−

+

µ