©

1987

BIPOLAR ANALOG INTEGRATED CIRCUIT

µµµµPC4071

J-FET INPUT LOW-NOISE OPERATIONAL AMPLIFIER

DATA SHEET

Document No. G15204EJ4V0DS00 (4th edition)

(Previous No. IC-1616)

Date Published November 2000 NS CP(K)

Printed in Japan

The information in this document is subject to change without notice. Before using this document, please

confirm that this is the latest version.

Not all devices/types available in every country. Please check with local NEC representative for

availability and additional information.

The mark 5 shows major revised points.

DESCRIPTION

The

µPC4071 is a J-FET input operational amplifier. This product is designed as low noise version of the µPC4081.

The features of the

µPC4071 are more improved input equivalent noise voltage, input offset voltage and input bias

current than those of

µPC4081. By these features, the µPC4071 is excellent choice for wide variety of applications

including audio preamplifier and active filter.

FEATURES

• Low noise: en = 18 nV/ Hz (TYP.)

• Very low input bias and offset currents

• Output short circuit protection

• High input impedance...J-FET Input stage

• Internal frequency compensation

• High slew rate...13 V/

µs (TYP.)

ORDERING INFORMATION

Part Number

Package

µPC4071C

8-pin plastic DIP (7.62 mm (300))

µPC4071G2

8-pin plastic SOP (5.72 mm (225))

EQUIVALENT CIRCUIT

PIN CONFIGURATION (Top View)

PC4071C, 4071G2

1

2

3

4

8

7

6

5

NC

V+

OUT

OFFSET

NULL

+

_

OFFSET

NULL

II

IN

V

µ

_

Remark NC : No Connection

R1

R8

R9

R6

D1

R7

R10

R11

D2

Q15

R4

R2

R5

R3

II

IN

(2)

Q1

Q2

Q8

Q16

Q9

Q10

Q12

Q13

Q5

Q14

Q3

Q4

Q11

Q6

Q7

C1

OFFSET

NULL

OFFSET

NULL

OUT

V

–

V

+

(3)

(1)

(5)

(6)

(4)

(7)