Preliminary

DFBM-CS320

Data Sheet

May 18, 2005

Proprietary Information and Specifications are Subject to Change

Host transport selection

The firmware configures itself when it boots by reading the values on a set of PIO pins.

Pin Values

Features

PIO[0] PIO[1] PIO[4]

Host Transport

Auto System Clock

Adaptation

Auto Baud Rate

Adaptation

0

0

0

BCSP (default)

Available (*1)

Available (*2)

0

0

1

BCSP with UATR configured to

use 2 stop bits and no parity

Available (*1)

Available (*2)

0

1

0

USB, 16 MHz crystal

Not available

Not appropriate

0

1

1

USB, 26 MHz crystal

Not available

Not appropriate

1

0

0

Three-wire UART

Available (*1)

Available (*2)

1

0

1

H4DS

Available (*1)

Available (*2)

1

1

0

UART (H4)

Available (*1)

Available (*2)

1

1

1

Undefined

-

-

(*1) If a UART-based host transport is selected and the firmware does not know its clock

frequency (because PSKEY_ANA_FREQ contains no value), then the firmware attempts to lock

on to the available system clock signal. Use of this mechanism implies booting the firmware

twice, as described in [AUTOBAUD]. PSKEY_ANA_FREQ has no default value.

(*2)

If

a

UART-based

host

transport

is

selected

and

the

baud

rate

defined

in

PSKEY_UART_BAUDRATE is zero (the default value), then the baud rate adaptation process

is invoked, as described in [AUTOBAUD].

If the PS Key contains a non-zero baud rate then the UART is configured with this value. If

the system clock adaptation mechanism is used, it may result in the processor running slower

than normal, so the consequent (measured) baud rate will also be affected.