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ISC0605NLS датащи(PDF) 4 Page - Infineon Technologies AG

номер детали ISC0605NLS
подробное описание детали  OptiMOSTM 5 Power-Transistor, 80 V
PDF  11 Pages
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производитель  INFINEON [Infineon Technologies AG]
домашняя страница  http://www.infineon.com
Logo INFINEON - Infineon Technologies AG

ISC0605NLS датащи(HTML) 4 Page - Infineon Technologies AG

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4
OptiMOSTM5Power-Transistor,80V
ISC0605NLS
Rev.2.1,2023-01-13
Final Data Sheet
3Electricalcharacteristics
atTj=25°C,unlessotherwisespecified
Table4Staticcharacteristics
Values
Min.
Typ.
Max.
Parameter
Symbol
Unit Note/TestCondition
Drain-source breakdown voltage
V(BR)DSS
80
-
-
V
VGS=0V,ID=1mA
Gate threshold voltage
VGS(th)
1.1
1.7
2.3
V
VDS=VGS,ID=115µA
Zero gate voltage drain current
IDSS
-
-
0.1
10
1
100
µA
VDS=80V,VGS=0V,Tj=25°C
VDS=80V,VGS=0V,Tj=125°C
Gate-source leakage current
IGSS
-
10
100
nA
VGS=20V,VDS=0V
Drain-source on-state resistance
RDS(on)
-
-
2.1
2.6
2.3
3.0
m
Ω
VGS=10V,ID=50A
VGS=4.5V,ID=25A
Gate resistance
1)
RG
-
1.7
2.6
Ω
-
Transconductance
gfs
70
140
-
S
|VDS|
≥2|ID|RDS(on)max,ID=50A
Table5Dynamiccharacteristics
Values
Min.
Typ.
Max.
Parameter
Symbol
Unit Note/TestCondition
Input capacitance
1)
Ciss
-
5800
7500
pF
VGS=0V,VDS=40V,f=1MHz
Output capacitance
1)
Coss
-
840
1100
pF
VGS=0V,VDS=40V,f=1MHz
Reverse transfer capacitance
1)
Crss
-
34
60
pF
VGS=0V,VDS=40V,f=1MHz
Turn-on delay time
td(on)
-
10.4
-
ns
VDD=40V,VGS=10V,ID=50A,
RG,ext=3
Ω
Rise time
tr
-
10.3
-
ns
VDD=40V,VGS=10V,ID=50A,
RG,ext=3
Ω
Turn-off delay time
td(off)
-
51
-
ns
VDD=40V,VGS=10V,ID=50A,
RG,ext=3
Ω
Fall time
tf
-
18.6
-
ns
VDD=40V,VGS=10V,ID=50A,
RG,ext=3
Ω
Table6Gatechargecharacteristics2)
Values
Min.
Typ.
Max.
Parameter
Symbol
Unit Note/TestCondition
Gate to source charge
Qgs
-
16
-
nC
VDD=40V,ID=50A,VGS=0to4.5V
Gate charge at threshold
Qg(th)
-
10
-
nC
VDD=40V,ID=50A,VGS=0to4.5V
Gate to drain charge
1)
Qgd
-
15
22
nC
VDD=40V,ID=50A,VGS=0to4.5V
Switching charge
Qsw
-
21
-
nC
VDD=40V,ID=50A,VGS=0to4.5V
Gate charge total
1)
Qg
-
44
55
nC
VDD=40V,ID=50A,VGS=0to4.5V
Gate plateau voltage
Vplateau
-
2.8
-
V
VDD=40V,ID=50A,VGS=0to4.5V
Gate charge total, sync. FET
Qg(sync)
-
36
-
nC
VDS=0.1V,VGS=0to4.5V
Output charge
1)
Qoss
-
88
117
nC
VDS=40V,VGS=0V
1) Defined by design. Not subject to production test.
2) See
″Gate charge waveforms″ for parameter definition



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