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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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MF8 датащи(PDF) 2 Page - National Semiconductor (TI) |
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MF8 датащи(HTML) 2 Page - National Semiconductor (TI) |
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2 / 24 page  Absolute Maximum Ratings (Note 1) If MilitaryAerospace specified devices are required please contact the National Semiconductor Sales OfficeDistributors for availability and specifications Supply Voltage (VS e Va b Vb) b 03V to a15V Voltage at any Input (Note 2) Vb b03V to Va a03V Input Current at any Input Pin (Note 2) g 1mA Output Short-Circuit Current (Note 7) g 1mA Power Dissipation (Note 3) 500 mW Storage Temperature b 65 Cto a150 C Soldering Information J Package 10 sec 260 C N Package 10 sec 300 C SO Package Vapor Phase (60 sec) 215 C Infrared (15 sec) 220 C ESD rating is to be determined See AN-450 ‘‘Surface Mounting Methods and Their Effect on Product Reliability’’ for other methods of soldering sur- face mount devices Operating Ratings (Note 1) Temperature Range TMIN s TA s TMAX MF8CCN 0 C s TA s a70 C MF8CCJ b 40 C s TA s a85 C Supply Voltage (VS e Va b Vb) a 9V to a14V fCLK c Q Range for 10 Hz s fCLK s 250 kHz any Q for 250 kHz s fCLK s 1 MHz fCLK c Q s 5 MHz Filter Electrical Characteristics The following specifications apply for Va ea5V Vb eb5V CLOAD e 50 pF and RLOAD e 50 kX on filter output unless otherwise specified Boldface limits apply for TMIN to TMAX all other limits TA e TJ e 25 C MF8CCN MF8CCJ Symbol Parameter Conditions Typical Tested Design Typical Tested Design Units (Notes 4 5) (Note 9) Limit Limit (Note 9) Limit Limit (Note 10) (Note 11) (Note 10) (Note 11) Ho Gain at fo fCLK e 250 kHz 602 g 05 602 g02 602 g005 602 g02 dB QQ 1001 392 g2% 392 g10% 392 g2% 392 g10% RfCLK fo ABCDE e 11100 992 g03% 992 g1% 992 g03% 992 g1% Ho Gain at fo fCLK e 250 kHz 602 g02 602 g05 602 g02 602 g05 dB QQ 1001 155 g3% 155 g12% 155 g3% 155 g12% RfCLK fo ABCDE e 10011 997 g03% 997 g1% 997 g03% 997g1% Ho Gain at fo fCLK e 250 kHz 585 g04 585 g1 585 g04 585 g1dB QQ 501 55 g5% 55 g14% 55 g5% 55 g14% RfCLK fo ABCDE e 00001 499 g02% 499 g1% 499 g02% 499 g1% Ho Gain at fo VS e g5V g5% 602 g05 602 602 g05 602 g15 dB fCLK s 250 kHz g 15 D QQTH Q Deviation from VS e g5V g5% Theoretical fCLK s 250 kHz Q l 1 g 5% g 15% g 5% g 15% (See Table I) fCLK s 100 kHz 1 k Q k 57 g 2% g 6% g 2% g 6% D RRTH fCLK fo Deviation VS e g5V g5% from Theoretical fCLK s 250 kHz g 03% g 1% g 03% g 1% (See Table I) QQ fCLK e 250 kHz 501 106 g2% 106 106 g2% 106 g10% ABCDE e 00110 g 10% Dynamic Range ABCDE e 11100 86 86 dB (Note 6) ABCDE e 10011 80 80 dB ABCDE e 00001 75 75 dB Clock Filter and Op Amp Feedthrough fCLK s 250 kHz Q s 180 80 mV Q l 140 40 mV IS Maximum Supply fCLK e 250 kHz no 912 12 9 13 mA Current loads on outputs VOS Maximum Filter fCLK e 250 kHz Q e 4 Output Offset 501 g 40 g 120 g 40 g 120 mV Voltage 1001 g 80 g 240 g 80 g 240 mV VOUT Minimum Filter RLOAD e 5kX g 41 g 38 g 38 g 41 g 36 V Output Swing (Note 6) 2 |
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