Nexperia

74LVC594A

8-bit shift register with output register

6. Pinning information

6.1. Pinning

74LVC594A

Q1

VCC

Q2

Q0

Q3

DS

Q4

STR

Q5

STCP

Q6

SHCP

Q7

SHR

GND

Q7S

001aag287

1

2

3

4

5

6

7

8

10

9

12

11

14

13

16

15

Fig. 5. Pin configuration SOT109-1 (SO16) and

SOT403-1 (TSSOP16)

001aag288

74LVC594A

Q7

SHR

Q6

SHCP

Q5

STCP

Q4

STR

Q3

DS

Q2

Q0

Transparent top view

GND(1)

7

10

6

11

5

12

4

13

3

14

2

15

terminal 1

index area

(1) This is not a ground pin. There is no electrical or

mechanical requirement to solder the pad. In case

soldered, the solder land should remain floating or

connected to GND.

Fig. 6. Pin configuration SOT763-1 (DHVQFN16)

6.2. Pin description

Table 2. Pin description

Symbol

Pin

Description

Q0, Q1, Q2, Q3, Q4, Q5, Q6, Q7

15, 1, 2, 3, 4, 5, 6, 7

parallel data output

GND

8

ground (0 V)

Q7S

9

serial data output

SHR

10

shift register reset (active LOW)

SHCP

11

shift register clock input

STCP

12

storage register clock input

STR

13

storage register reset (active LOW)

DS

14

serial data input

VCC

16

supply voltage

74LVC594A

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Product data sheet

Rev. 4 — 3 September 2020

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