AD9481 datasheet(9/28 Pages) AD

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AD9481

Rev. 0 | Page 9 of 28

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

CLK–

AVDD

AGND

D7A (MSB)

DRGND

DRVDD

CLK+

D6A

D5A

D4A

D3A

AGND

AVDD

DRGND

PDWN

SENSE

D7B (MSB)

D6B

D5B

D4B

13 14

16 17 18

PIN 1

44 43 42

40 39 38

AD9481

TOP VIEW

(Not to Scale)

Figure 3. Pin Configuration

Table 7. Pin Function Descriptions

No.

Name

Description

CLK+

Input Clock—True

CLK−

Input Clock—Complement

AVDD

3.3 V Analog Supply

AGND

Analog Ground

DRVDD

3.3 V Digital Output Supply

DRGND

Digital Ground

D7A

Data Output Bit 7—Channel A (MSB)

D6A

Data Output Bit 6—Channel A

D5A

Data Output Bit 5—Channel A

D4A

Data Output Bit 4—Channel A

D3A

Data Output Bit 3—Channel A

D2A

Data Output Bit 2—Channel A

D1A

Data Output Bit 1—Channel A

D0A

Data Output Bit 0—Channel A (LSB)

DRGND

Digital Ground

DCO−

Data Clock Output—Complement

DCO+

Data Clock Output—True

DRVDD

3.3 V Digital Output Supply

D0B

Data Output Bit 0—Channel B (LSB)

D1B

Data Output Bit 1—Channel B

D2B

Data Output Bit 2—Channel B

D3B

Data Output Bit 3—Channel B

D4B

Data Output Bit 4—Channel B

D5B

Data Output Bit 5—Channel B

No.

Name

Description

D6B

Data Output Bit 6—Channel B

D7B

Data Output Bit 7—Channel B (MSB)

DRGND

Digital Ground

Data Format Select and Duty Cycle Stabilizer

Select

PDWN

Power-Down Selection

AVDD

3.3 V Analog Supply

AVDD

3.3 V Analog Supply

AGND

Analog Ground

SENSE

Reference Mode Selection

VREF

Voltage Reference Input/Output

AGND

Analog Ground

AVDD

3.3 V Analog Supply

AGND

Analog Ground

VIN−

Analog Input—Complement

VIN+

Analog Input—True

AGND

Analog Ground

AVDD

3.3 V Analog Supply

DCO Enable Select (Tie to AVDD for DCO

Active)

DS−

Data Sync Complement (If Unused, Tie to

DRVDD)

DS+

Data Sync True (If Unused, Tie to DGND)

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