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© Koninklijke Philips Electronics N.V. 2005. All rights reserved.

Product data sheet

Rev. 01 — 13 October 2005

3 of 17

Philips Semiconductors

PCK9447

3.3 V/2.5 V 1 : 9 LVCMOS clock fan-out buffer

5.

Pinning information

5.1 Pinning

5.2 Pin description

Fig 2.

Pin configuration for LQFP32

PCK9447BD

GND

GND

CLK_SEL

Q3

CCLK0

CCLK1

Q4

CLK_STOP

GND

OE

Q5

GND

GND

002aaa715

1

2

3

4

5

6

7

8

24

23

22

21

20

19

18

17

Table 2:

Pin description

Symbol

Pin

Type

Description

CCLK0

3

I

clock signal input

CCLK1

4

I

alternative clock signal input

CLK_SEL

2

I

clock input select

CLK_STOP

5

I

clock output enable/disable

OE

6

I

output enable/disable (high-impedance, 3-state)

Q0 to Q8

30, 28, 26,

23, 21, 19,

15, 13, 11

O

clock outputs

GND

1, 8, 9, 12,

16, 17, 20,

24, 25, 29,

32

ground

negative power supply (GND)

7, 10, 14,

18, 22, 27,

31

power

be connected to the positive power supply for correct

operation.