AD7329 datasheet(19/40 Pages) AD

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AD7329

Rev. 0 | Page 19 of 40

VDD

ADCIN–

MUXOUT–

VIN–

VSS

VDD

ADCIN+

MUXOUT+

VIN+

VSS

Figure 31. Equivalent Analog Input Circuit (Differential)

Care should be taken to ensure that the analog input does not

exceed the VDD and VSS supply rails by more than 300 mV.

Exceeding this value causes the diodes to become forward

biased and to start conducting into either the VDD supply rail or

the VSS supply rail. These diodes can conduct up to 10 mA

without causing irreversible damage to the part.

In Figure 30 and Figure 31, Capacitor C1 is typically 4 pF and

can primarily be attributed to pin capacitance. Resistor R1 is a

lumped component made up of the on resistance of the input

multiplexer and the track-and-hold switch. Capacitor C2 is the

sampling capacitor; its capacitance varies depending on the

analog input range selected (see the Specifications section).

TRACK-AND-HOLD SECTION

The track-and-hold on the analog input of the AD7329 allows

the ADC to accurately convert an input sine wave of full-scale

amplitude to 13-bit accuracy. The input bandwidth of the track-

and-hold is greater than the Nyquist rate of the ADC. The

AD7329 can handle frequencies up to 20 MHz.

The ADCIN pins connect directly to the input stage of the track-

and-hold circuit. This is a high impedance input. Connecting

the MUXOUT pins directly to the ADCIN pins connects the

multiplexer output to the track-and-hold circuit. The input

voltage range on the ADCIN pins is determined by the range

ensure that the input voltage to the ADCIN pins is within the

selected voltage range.

The track-and-hold enters its tracking mode on the 14th SCLK

rising edge after the CS falling edge. The time required to

acquire an input signal depends on how quickly the sampling

capacitor is charged. With zero source impedance, 300 ns is

sufficient to acquire the signal to the 13-bit level.

The acquisition time required is calculated using the following

formula:

tACQ = 10 × ((RSOURCE + R)C)

where C is the sampling capacitance, and R is the resistance

seen by the track-and-hold amplifier looking at the input.

For the AD7329, the value of R includes the on resistance of the

input multiplexer. The value of R is typically 300 Ω. RSOURCE

should include any extra source impedance on the analog input.

The AD7329 enters track mode on the 14th SCLK rising edge.

When the AD7329 is run at a throughput rate of 1 MSPS with a

20 MHz SCLK signal, the ADC has approximately 1.5 SCLK

periods plus t8 plus the quiet time, tQUIET, to acquire the analog

input signal. The ADC goes back into hold mode on the CS

falling edge.

The current required to drive the ADC is extremely small when

using the external op amp between the MUXOUT and ADCIN

pins. This is due to the high input impedance of the op amp

placed between the MUXOUT and ADCIN pins. This can be seen

in Figure 32, where the current required to drive the AD7329

input is <0.2 μA when AD8021 is placed between the MUXOUT

and ADCIN pins.

0.20

0.14

1000

THROUGHPUT RATE (kSPS)

0.19

0.18

0.17

0.16

0.15

100

200

300

400

500

600

700

800

900

VDD = 12V, VSS = –12V

VCC = VDRIVE = 5V

SINGLE-ENDED MODE

50kHz ON SELECTED CHANNEL

fIN = 50kHz

TA = 25°C

AD8021 BETWEEN MUXOUT

AND ADCIN PINS

Figure 32. Input Current vs. Throughput Rate

with AD8021 Between MUXOUT and ADCIN

1000

THROUGHPUT RATE (kSPS)

100

200

300

400

500

600

700

800

900

VDD = 12V, VSS = –12V

VCC = VDRIVE = 5V

SINGLE-ENDED MODE

50kHz ON SELECTED CHANNEL

fIN = 50kHz

TA = 25°C

WIRE LINK BETWEEN MUXOUT

AND ADCIN PINS

Figure 33. Input Current vs. Throughput Rate

with a Wire Link Between MUXOUT and ADCIN

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