AD6624AS datasheet(3/40 Pages) AD

номер детали	AD6624AS

подробное описание детали	Four-Channel, 80 MSPS Digital Receive Signal Processor (RSP)

PDF	40 Pages

Scroll/Zoom	100%

производитель	AD [Analog Devices]

домашняя страница	http://www.analog.com

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3 / 40 page

REV. B

–3–

AD6624

RECOMMENDED OPERATING CONDITIONS

Test

AD6624AS

Parameter

Level

Min

Typ

Max

Unit

VDD

2.375

2.5

2.675

VDDIO

3.0

3.3

3.6

TAMBIENT

–40

+25

+70

°C

ELECTRICAL CHARACTERISTICS

Test

AD6624AS

Parameter (Conditions)

Temp

Level

Min

Typ

Max

Unit

LOGIC INPUTS (5 V TOLERANT)

Logic Compatibility

Full

3.3 V CMOS

Logic “1” Voltage

Full

2.0

5.0

Logic “0” Voltage

Full

–0.3

+0.8

Logic “1” Current

Full

µA

Logic “0” Current

Full

µA

Input Capacitance

°CV

LOGIC OUTPUTS

Logic Compatibility

Full

3.3 V CMOS/TTL

Logic “1” Voltage (IOH = 0.25 mA)

Full

2.4

VDD – 0.2

Logic “0” Voltage (IOL = 0.25 mA)

Full

0.2

0.4

IDD SUPPLY CURRENT

CLK = 80 MHz, (VDD = 2.75 V, VDDIO = 3.6 V)

Full

IVDD

400

IVDDIO

CLK = GSM Example (65 MSPS, VDD = 2.5 V,

VDDIO = 3.3 V, Dec = 2/10/6 120 Taps 4 Channels)

°CV

IVDD

250

IVDDIO

POWER DISSIPATION

CLK = 80 MHz TD-SCDMA

Full

1.1

CLK = 65 MHz GSM/EDGE Example

700

Sleep Mode

Full

287

µW

Specifications subject to change without notice.

SPECIFICATIONS (VDD = 2.5 V 5%, VDDIO = 3.3 V 10%. All specifications T

A = TMIN to TMAX, unless otherwise noted.)

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