ADATE205

Rev. 0 | Page 15 of 16

THEORY OF OPERATION

The ADATE205 has two general classes of logic inputs:

differential inputs for controlling functions that generally need

to be operated at high speed, and single-ended CMOS inputs

for setting operating modes or other low speed functions. The

differential inputs have a wide common-mode range that allows

them to be used with a variety of logic families. The differential

inputs can also be used single-ended, with one input from each

pair of inputs tied to a fixed reference, but this makes precise

timing more difficult to achieve.

These differential input pins provide 50 Ω input termination

resistors for use as desired. The single-ended inputs have an

input range compatible with most logic families and are high

impedance to make driving them very easy. The switching

threshold for the single-ended inputs is preset to one-half of the

voltage at the CMOS_VDD pin.

Table 4. Driver and Load Modes

LDEN

(CMOS Single-Ended)

VTEN

(CMOS Single-Ended)

DR_EN

(High Speed Differential)

DR_DATA

(High Speed Differential)

Driver

Status

Load

Status

0

0

0

X

High-Z

High-Z

0

0

1

0

VIL

High-Z

0

0

1

1

VIH

High-Z

0

1

0

X

VIT

High-Z

0

1

1

0

VIL

High-Z

0

1

1

1

VIH

High-Z

1

0

0

X

High-Z

ON

1

0

1

0

VIL

High-Z

1

0

1

1

VIH

High-Z

Table 5. Comparator Low Leakage Mode

CLLM (CMOS Single-Ended)

Typical DUT Pin Bias Current

0

1 μA

1

10 nA

Table 6. Rise/Fall Time Selection 3 V, 10% to 90%, Unterminated

Slew 1

Slew 0

Tr/Tf (ns)

0

0

1.4

0

1

1.9

1

0

2.8

1

1

5.6

Table 7. Comparator Logic Function

Output States

DUT Pin Voltage

COMP_L_P

COMP_L_N

COMP_H_P

COMP_H_N

>CVL

>CVH

1

0

1

0

>CVL

<CVH

1

0

0

1

<CVL

>CVH

0

1

1

0

<CVL

<CVH

0

1

0

1