ICS8536-01 Data Sheet

CRYSTAL/LVCMOS/DIFFERENTIAL-TO-LVPECL FANOUT BUFFER

ICS8536AG-01 REVISION B AUGUST 17, 2012

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The clock layout topology shown below is a typical termination

for LVPECL outputs. The two different layouts mentioned are

recommended only as guidelines.

The differential outputs are low impedance follower outputs that

generate ECL/LVPECL compatible outputs. Therefore, termi-

nating resistors (DC current path to ground) or current sources

must be used for functionality. These outputs are designed to

drive 50

Ω transmission lines. Matched impedance techniques

should be used to maximize operating frequency and minimize

signal distortion.

Figures 5A and 5B show two different layouts

which are recommended only as guidelines. Other suitable

clock layouts may exist and it would be recommended that the

board designers simulate to guarantee compatibility across all

printed circuit and clock component process variations.

TERMINATION FOR 3.3V LVPECL OUTPUTS

FIGURE 5B. LVPECL OUTPUT TERMINATION

FIGURE 5A. LVPECL OUTPUT TERMINATION

INPUTS:

CRYSTAL INPUTS

For applications not requiring the use of the crystal oscillator input,

both XTAL_IN and XTAL_OUT can be left floating. Though not

required, but for additional protection, a 1k

Ω resistor can be tied

from XTAL_IN to ground.

CLK INPUT

For applications not requiring the use of the clock, it can be left

floating. Though not required, but for additional protection, a 1k

Ω

resistor can be tied from the CLK input to ground.

CLK/nCLK INPUTS

For applications not requiring the use of the differential input,

both CLK and nCLK can be left floating. Though not required, but

for additional protection, a 1k

Ω resistor can be tied from CLK to

ground.

LVCMOS CONTROL PINS

All control pins have internal pull-ups or pull-downs; additional

resistance is not required but can be added for additional

protection. A 1k

Ω resistor can be used.

RECOMMENDATIONS FOR UNUSED INPUT AND OUTPUT PINS

OUTPUTS:

LVPECL OUTPUTS

All unused LVPECL outputs can be left floating. We recommend

that there is no trace attached. Both sides of the differential output

pair should either be left floating or terminated.