HD74LS112

Rev.3.00, Jul.13.2005, page 2 of 8

Function Table

Inputs

Outputs

Preset

Clear

Clock

J

K

Q

Q

L

H

X

X

X

H

L

H

L

X

X

X

L

H

L

L

X

X

X

H*

H*

H

H

↓

L

L

QO

Q

O

H

H

↓

H

L

H

L

H

H

↓

L

H

L

H

H

H

↓

H

H

Toggle

H

H

H

X

X

QO

Q

O

Notes: H; high level, L; low level, X; irrelevant

↓; transition from high to low level

Q; level of Q before the indicated steady-state input conditions were established.

Q; complement of Q

O or level of Q before the indicated steady-state input conditions were established.

Toggle; each output changes to the complement of its previous level on each active transition indicated by

↓.

*; This configuration is nonstable; that is, it will not persist when preset and clear inputs return to their inactive

(high) level.

Block Diagram (1/2)

Clock

J

K

Q

Q

Clear

Preset

Absolute Maximum Ratings

Item

Symbol

Ratings

Unit

Supply voltage

VCC

7

V

Input voltage

VIN

7

V

Power dissipation

PT

400

mW

Storage temperature

Tstg

–65 to +150

°C

Note:

Voltage value, unless otherwise noted, are with respect to network ground terminal.