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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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ICS953002 датащи(PDF) 26 Page - Renesas Technology Corp |
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ICS953002 датащи(HTML) 26 Page - Renesas Technology Corp |
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26 / 36 page  26 Integrated Circuit Systems, Inc. ICS953002 0924—11/18/09 I 2C Table: Output Divider Control Register Bit 7 Reserved Reserved RW 1 Bit 6 Reserved Reserved RW 1 Bit 5 Reserved Reserved RW 1 Bit 4 Reserved Reserved RW 1 Bit 3 AGP/PCIDiv3 RW 0000:/4 0100:/8 1000:/16 1100:/32 X Bit 2 AGP/PCIDiv2 RW 0001:/3 0101:/6 1001:/12 1101:/24 X Bit 1 AGP/PCIDiv1 RW 0010:/5 0110:/10 1010:/20 1110:/40 X Bit 0 AGP/PCIDiv0 RW 0011:/9 0111:/18 1011:/36 1111:/72 X I 2C Table: PLL2 Frequency Control Register Bit 7 N Div8 N Divider Prog bit 8 RW X Bit 6 N Div9 N Divider Prog bit 9 RW X Bit 5 M Div5 RW X Bit 4 M Div4 RW X Bit 3 M Div3 RW X Bit 2 M Div2 RW X Bit 1 M Div1 RW X Bit 0 M Div0 RW X I 2C Table: PLL2 Frequency Control Register Bit 7 N Div7 RW X Bit 6 N Div6 RW X Bit 5 N Div5 RW X Bit 4 N Div4 RW X Bit 3 N Div3 RW X Bit 2 N Div2 RW X Bit 1 N Div1 RW X Bit 0 N Div0 RW X I 2C Table: PLL2 Spread Spectrum Control Register Bit 7 SSP7 RW X Bit 6 SSP6 RW X Bit 5 SSP5 RW X Bit 4 SSP4 RW X Bit 3 SSP3 RW X Bit 2 SSP2 RW X Bit 1 SSP1 RW X Bit 0 SSP0 RW X 1 -- - - - The decimal representation of M and N Divier in Byte 17 and 18 will configure the PLL2 VCO frequency. Default at power up = latch-in or Byte 0 Rom table. VCO Frequency = 14.318 x [NDiv(9:0)+8] / [MDiv(5:0)+2] M Divider Programming bits Type 0 1 0 Byte 16 Pin # Name Control Function - - - - - - - - - - 1 - - - - - N Divider Programming b(7:0) Byte 18 - - - 0 Byte 17 Pin # Name Control Function - - The decimal representation of M and N Divier in Byte 17 and 18 will configure the PLL2 VCO frequency. Default at power up = latch-in or Byte 0 Rom table. VCO Frequency = 14.318 x [NDiv(9:0)+8] / [MDiv(5:0)+2] - - - - - - - PWD PWD PWD Name Control Function - Type AGP/PCI Divider Ratio Programmaing Bits PLL1 - - - - - - Byte 19 Pin # Pin # - Name Control Function Type Type PWD 01 These Spread Spectrum bits in Byte 19 and 20 will program the spread pecentage of PLL2 Spread Spectrum Programming b(7:0) |
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