2

Integrated

Circuit

Systems, Inc.

ICS950908

Preliminary Product Preview

0653A—07/26/04

General Description

The ICS950908 is a single chip clock solution for desktop designs using the VIA Pro266/PN266/CLE266/CM400 chipset with

PC133 or DDR memory.

The ICS950908 is part of a whole new line of ICS clock generators and buffers called TCH™ (Timing Control Hub). This part

incorporates ICS's newest clock technology which offers more robust features and functionality. Employing the use of a

serially programmable I

2C interface, this device can adjust the output clocks by configuring the frequency setting, the output

divider ratios, selecting the ideal spread percentage, the output skew, the output strength, and enabling/disabling each

individual output clock. M/N control can configure output frequency with resolution up to 0.1MHz increment.

Block Diagram

VDD

GND

55

2

Xtal, Ref

5

9

AGP [0:2], CPU digital, CPU PLL

16

13

PCI [0:5], PCI_F outputs

22

19

48MHz, Fix Digital, Fix Analog

23

24

Master clock, CPU Analog

34, 40

33, 39

DDR/SDR outputs

50

47

2.5V CPUT_CS output

51

54

3.3V CPUT/C & CPUOD_T/C

Pin Number

Description

Power Groups

FBOUT

(1:0)

Mode

SEL_SDR/DDR#

BUF_IN

SEL_408/K7#