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DP2525B датащи(PDF) 7 Page - List of Unclassifed Manufacturers |
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DP2525B датащи(HTML) 7 Page - List of Unclassifed Manufacturers |
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7 / 11 page ![]() DP2525 Low Cost Primary Side Regulation(PSR) PWM Power Switch 7/11 Rev.2.0 PERATION DESCRIPTION DP2525 is a high performance, multi mode, highly integrated DCM (Discontinuous Conduction Mode) Primary Side Regulation (PSR) controller. The built- in high precision CV/CC control with high level protection features makes it suitable for offline small power converter applications. System Start-Up Operation Before the IC starts to work, it consumes only startup current (typically 3uA) which allows a large value startup resistor to be used to minimize the power loss and the current flowing through the startup resistor charges the VDD hold-up capacitor from the high voltage DC bus. When VDD reaches UVLO turn-on voltage of 18V (typical), DP2525 begins switching and the IC operation current is increased to be 1mA (typical). The hold-up capacitor continues to supply VDD before the auxiliary winding of the transformer takes the control of VDD voltage. Fig.1 Once DP2525 enters very low frequency FM (Frequency Modulation) mode, the operating current is reduced to be 0.8mA typically, which helps to reduce the standby power loss. PSR Constant Voltage Modulation (PSR-CVM) In primary side control, the output voltage is sensed on the auxiliary winding during the transfer of transformer energy to the secondary. Fig.2 illustrates the CV sampling signal timing waveform in DP2525. As shown in Fig.2, it is clear that there is a down slope representing a decreasing total rectifier Vf and its voltage drop as the secondary current decreases to zero. To achieve an accurate representation of the secondary output voltage on the auxiliary winding, the CV sampling signal blocks the leakage inductance reset and ringing. When the CV sampling process is over, the internal sample/hold (S&H) circuit captures the error signal and amplifies it through the internal Error Amplifier (EA). The output of EA is sent to the Primary Side Constant Voltage Modulator (PSR-CVM) for CV control. The internal reference voltage for EA is trimmed to 2V with high accuracy. During the CV sampling process, an internal variable current source is flowing to FB pin for Cable Drop Compensation (CDC). Thus, there is a step at FB pin in the transformer demagnetization process, as shown in Fig.2. Fig.2 also illustrates the equation for “demagnetization plateau”, where Vo and VF is the output voltage and diode forward voltage; R1 and R2 is the resistor divider connected from the auxiliary winding to FB Pin, Ns and Na are secondary winding and auxiliary winding respectively. When system enters over load condition, the output voltage falls down and the FB sampled voltage should be lower than 2V internal reference which makes system enter CC Mode automatically. |
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