8.0 mΩ, which give a shunt voltage limit of 72 mV. Once the shunt voltage limit is known, the value for the shunt

over voltage limit register is calculated by dividing the shunt voltage limit by the shunt voltage LSB size.

For this case, the calculated value of the alert limit register is 72 mV / 2.5 μV = 28800d (7080h) .

Values stored in the alert limit register are set to the default values after VS power cycle events and need to be

reprogrammed each time power is applied.

8.2.2.5 Calculate Returned Values

Table 8-4 below shows the register values assuming the design requirements shown in Table 8-3. User

programmed values for the Configuration, Calibration, Mask/Enable and Alert limit registers are shown, as well

as, the returned values for shunt voltage, current, bus voltage and power. Parametric values are calculated by

multiplying the returned value by the LSB value.

Table 8-4. Calculate Returned Values

Register

Contents

LSB Value

Calculated Value

Configuration (0h)

16679d (4127h)

—

—

Calibration (5h)

1280d (500h)

—

—

Mask/Enable (6h)

32768 (8000h)

—

—

Alert Limit (7h)

28800d (7080h)

2.5 μV/LSB

28800 × 2.5 μV = 0.072 V

Shunt Voltage (1h)

19200d (4B00h)

2.5 µV/LSB

19200 × 2.5 μV = 0.048 V

Bus Voltage (2h)

7500d (1D4Ch)

1.6 mV/LSB

7500 × 1.6 mV = 12 V

Current (4h)

12000d (2EE0h)

500 µA/LSB

12000 × 500 µA = 6 A

Power (3h)

4500d (1194h)

Current LSB x 32 = 16 mW/LSB

4500 × 16 mW = 72 W

Shunt Voltage and Current return values in two's complement format. In two's complement format a negative

value in binary is represented by having a 1 in the most significant bit of the returned value. These values can

be converted to decimal by first inverting all the bits and adding 1 to obtain the unsigned binary value. This value

should then be converted to decimal with the negative sign applied.

8.2.3 Application Curves

Figure 8-3 shows the ALERT pin response to a shunt overvoltage limit of 72 mV for a conversion time (tCT)

of 140 µs and averaging set to 1. Figure 8-4 shows the response for the same limit but with the conversion

time increased to 1.1 ms. For the scope shots shown in these figures, persistence was enabled on the ALERT

channel. Figure 8-3 and Figure 8-4 show how the ALERT response time can vary depending on when the fault

condition occurs relative to the internal ADC clock of the INA232. For fault conditions that are just exceeding the

limit threshold, the response time for the ALERT pin can vary from one to two conversion cycles. As mentioned

previously, the variation is because of the timing on when the fault event occurs relative to the start time of the

internal ADC conversion cycle. For fault events that greatly exceed the limit threshold, the alert can respond in

less than one conversion cycle.

TIME (50 µs / div)

LIMIT: 72 mV

~140 µs (1 conversion)

< 280 µs (2 conversions)

Figure 8-3. Alert Response (tCT = 140 µs)

TIME (500 µs / div)

LIMIT: 72 mV

1000 µs (~1 conversion)

< 2200 µs (2 conversions)

Figure 8-4. Alert Response (tCT = 1.1 ms)

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INA232

SBOSAA2 – DECEMBER 2022

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