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ICS91309

0093H—12/09/08

Application Suggestion:

ICS91309 is a mixed analog/digital product. The analog portion of the PLL is very sensitive to any random noise

generated by charging or discharging of internal or external capacitor on the power supply pins. This type of noise will

cause excess jitter to the outputs of ICS91309. Below is a recommended lay out to alleviate any addition noise. For

additional information on FT. layout, please refer to our AN07.The 0.1 uF capacitors should be connected as close as

possible to power pins (4 & 13). An Isolated power plane with a 2.2 uF capacitor to ground will enhance the power line

stability.

33Ω

33Ω

33Ω

33Ω

10KΩ

0.1µF

VDD

GND

33Ω

33Ω

33Ω

33Ω

33Ω

10KΩ

0.1µF

VDD

GND

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

REF

CLKA1

CLKA2

VDD

GND

CLKB1

CLKB2

FS2

CLKOUT

CLKA4

CLKA3

VDD

GND

CLKB4

CLKB3

FS1