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©2020 Renesas Electronics Corporation

January 7, 2020

ICS83940DI Datasheet

Package Outline Drawings

The package outline drawings are appended at the end of this document and are accessible from the link below. The package information

is the most current data available.

www.idt.com/us/en/document/psc/prg32-package-outline-70-x-70-mm-lqfp

Ordering Information

Table 8. Ordering Information

Revision History

Part/Order Number

Marking

Package

Shipping Packaging

Temperature

83940DYILF

ICS83940DYIL

“Lead-Free” 32 Lead LQFP

Tray

-40

C to 85C

83940DYILFT

ICS83940DYIL

“Lead-Free” 32 Lead LQFP

Tape & Reel

-40

C to 85C

Date

Description

January 7, 2020

▪ Removed Output Duty Cycle specification from table 5B.

▪ Updated Output Duty Cycle specifications in table 5C.

▪ Removed 83940DKILF/T devices from Ordering Information table.

▪ Updated Package Outline Drawings section.

▪ Rebranded document to Renesas template.

May 19, 2016

Product Discontinuation Notice - Last time buy expires May 6, 2017. (83940DKILF)

PDN CQ-16-01.

March 20, 2013

Deleted “PROPOSED” stamp.

November 27, 2012

Removed leaded orderables from Ordering Information table.

September 7, 2010

Pin Characteristics Table - ROUT error, typical spec deleted.

Updated Wiring the Differential Input to Accept Single-Ended Levels.

Updated 32 VFQFN Package Outline.

August 13, 2009

Added 32 Lead VFQFN Pin Assignment.

Added VFQFN Thermal Release Path section.

Added 32 VFQFN Thermal Table.

Added 32 Lead VFQFN Package and Dimensions Table.

Ordering Information Table - added 32 Lead VFQFN ordering information.

Converted datasheet format.

February 21, 2007

Absolute Maximum Ratings - corrected Storage Temperature from

“-40°C to 125°C” to “-65°C to 150°C”.

November 27, 2006

Features Section - added Lead-Free bullet.

Application Information Section - added Recommendations for Unused Input and Output Pins.

Application Information Section - added LVPECL Clock Input Interface.

Ordering Information Table - added Lead-Free part number, marking, and note.

Updated datasheet format.

December 12, 2002

Pin Characteristics table - changed ROUT 25 maximum to 28 maximum.

Delete RPULLUP row.

3.3V Output Load AC Test Circuit diagram - corrected GND equation to read

-1.65V... from -1.165V...

Added LVTTL to title.

Updated format.