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MPC5553AVF112 датащи(PDF) 46 Page - Freescale Semiconductor, Inc

номер детали MPC5553AVF112
подробное описание детали  Microcontroller
PDF  60 Pages
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производитель  FREESCALE [Freescale Semiconductor, Inc]
домашняя страница  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MPC5553AVF112 датащи(HTML) 46 Page - Freescale Semiconductor, Inc

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MPC5553 Microcontroller Data Sheet, Rev. 0
Preliminary—Subject to Change Without Notice
Electrical Characteristics
Freescale Semiconductor
46
3.14.2
MII Transmit Signal Timing (TXD[3:0], TX_EN, TX_ER, TX_CLK)
The transmitter functions correctly up to a TX_CLK maximum frequency of 25 MHz +1%. There is no
minimum frequency requirement. In addition, the processor clock frequency must exceed twice the
TX_CLK frequency.
The transmit outputs (TXD[3:0], TX_EN, TX_ER) can be programmed to transition from either the rising
or falling edge of TX_CLK, and the timing is the same in either case. This options allows the use of
non-compliant MII PHYs.
Refer to the ethernet chapter of the device Reference Manual for details of this option and how to enable it.
Table 29 lists MII transmit channel timings.
Figure 29 shows MII transmit signal timings listed in Table 29.
Figure 29. MII Transmit Signal Timing Diagram
Table 29. MII Transmit Signal Timing
Num
Characteristic
Min
Max
Unit
5
TX_CLK to TXD[3:0], TX_EN, TX_ER invalid
5
—
ns
6
TX_CLK to TXD[3:0], TX_EN, TX_ER valid
—
25
ns
7
TX_CLK pulse width high
35%
65%
TX_CLK period
8
TX_CLK pulse width low
35%
65%
TX_CLK period
M6
TX_CLK (input)
TXD[3:0] (outputs)
TX_EN
TX_ER
M5
M7
M8



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