LT6204IGN datasheet(15/24 Pages) LINER

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LT6202/LT6203/LT6204

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Amplifier Characteristics

Figure 1 shows a simplified schematic of the LT6202/

LT6203/LT6204, which has two input differential amplifi-

ers in parallel that are biased on simultaneously when the

common mode voltage is at least 1.5V from either rail. This

topology allows the input stage to swing from the positive

supply voltage to the negative supply voltage. As the

common mode voltage swings beyond VCC– 1.5V, current

source I1 saturates and current in Q1/Q4 is zero. Feedback

is maintained through the Q2/Q3 differential amplifier, but

with an input gm reduction of 1/2. A similar effect occurs

with I2 when the common mode voltage swings within

1.5V of the negative rail. The effect of the gm reduction is

a shift in the VOS as I1 or I2 saturate.

Figure 1. Simplified Schematic

APPLICATIO S I FOR ATIO

Input bias current normally flows out of the + and – inputs.

The magnitude of this current increases when the input

common mode voltage is within 1.5V of the negative rail,

and only Q1/Q4 are active. The polarity of this current

reverses when the input common mode voltage is within

1.5V of the positive rail and only Q2/Q3 are active.

The second stage is a folded cascode and current mirror

that converts the input stage differential signals to a single

ended output. Capacitor C1 reduces the unity cross

frequency and improves the frequency stability without

degrading the gain bandwidth of the amplifier. The

differential drive generator supplies current to the output

transistors that swing from rail-to-rail.

DIFFERENTIAL

DRIVE

GENERATOR

–

Q10

Q11

DESD2

DESD4

DESD3

DESD1

DESD5

DESD6

–

VBIAS

–V

V+

V–

6203/04 F01

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