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ICS1893AFILF датащи(PDF) 114 Page - Renesas Technology Corp

номер детали ICS1893AFILF
подробное описание детали  3.3-V 10Base-T/100Base-TX Integrated PHYceiver
PDF  137 Pages
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производитель  RENESAS [Renesas Technology Corp]
домашняя страница  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

ICS1893AFILF датащи(HTML) 114 Page - Renesas Technology Corp

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ICS1893AF, Rev D 10/26/04
October, 2004
114
Chapter 10
DC and AC Operating Conditions
ICS1893AF Data Sheet - Release
Copyright © 2004, Integrated Circuit Systems, Inc.
All rights reserved.
10.5
Timing Diagrams
10.5.1
Timing for Clock Reference In (REF_IN) Pin
Table 10-8 lists the significant time periods for signals on the clock reference in (REF_IN) pin. Figure 10-2
shows the timing diagram for the time periods.
Note:
The REF_IN switching point is 50% of VDD.
Figure 10-2.
REF_IN Timing Diagram
Table 10-8.
REF_IN Timing
Time
Period
Parameter
Conditions
Min.
Typ.
Max.
Units
t1
REF_IN Duty Cycle
–
40
50
60
%
t2
REF_IN Period
–
–
40
–
ns
REF_IN
t1
t2



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