ICS672-01/02

QUADRACLOCK QUADRATURE DELAY BUFFER

ZERO DELAY BUFFER

IDT™ / ICS™ QUADRACLOCK QUADRATURE DELAY BUFFER

5

ICS672-01/02

REV L 051310

AC Electrical Characteristics

VDD = VDDIO = 3.3 V, Ambient Temperature 0 to +70

° C, unless stated otherwise

Note 1: With ICLK = 20 MHz, FBCLK to FBIN, all outputs at 40 MHz.

Note 2: With ICLK = 66.5 MHz, FBCLK to FBIN, all outputs at 133 MHz.

Note 3: Value depends on multiplier. Must also meet output clock frequency.

Note 4: With CLK0CLK270 equally loaded, and output frequency > 60 MHz.

Note 5: Rising edge of ICLK compared with rising edge of CLk0, with FBCLK connected to FBIN, 15 pF load on

CLK0, and CLK0 > 60 MHz.

Note 6: Commercial grade.

Note 7: Industrial grade.

Thermal Characteristics

Operating Supply

Current

IDD

No Load, S1=1, S0=0,

S2=0, Notes 2, 6

22

mA

No Load, S1=1, S0=0,

S2=0, Notes 2, 7

66

mA

Short Circuit Current

IOS

Each output

±50

mA

Input Capacitance

CIN

OE, select pins

7

pF

Parameter

Symbol

Conditions

Min.

Typ.

Max.

Units

Input Clock Frequency

fIN

Note 3

5

150

MHz

Output Clock Frequency

ICS672-01

15

84

MHz

Output Clock Frequency

ICS672-02

15

135

MHz

Output Rise Time

tOR

0.8 to 2.0 V, no load, CL = 15 pF

1.0

ns

Output Fall Time

tOF

2.0 to 0.8 V, no load, CL = 15 pF

1.0

ns

Output Clock Duty Cycle,

VDDIO = 3.3 V

tDC

At VDDIO/2

45

50

55

%

Phased Outputs

Accuracy

Rising edges at VDDIO/2,

Note 4

-250

250

ps

Input to Output Skew

ICLK to CLK0, Note 5

-300

300

ps

Maximum Absolute Jitter

75

ps

Cycle to Cycle Jitter

15 pF loads

150

ps

Parameter

Symbol

Conditions

Min.

Typ.

Max.

Units

Thermal Resistance Junction to

Ambient

θJA

Still air

120

° C/W

θJA

1 m/s air flow

115

° C/W

θJA

3 m/s air flow

105

° C/W

Thermal Resistance Junction to Case

θJC

58

° C/W

Parameter

Symbol

Conditions

Min.

Typ.

Max.

Units