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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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82V3012PVG датащи(PDF) 2 Page - Renesas Technology Corp |
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82V3012PVG датащи(HTML) 2 Page - Renesas Technology Corp |
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2 / 33 page  Description 2 February 6, 2009 IDT82V3012 T1/E1/OC3 WAN PLL WITH DUAL REFERENCE INPUTS DESCRIPTION The IDT82V3012 is a T1/E1/OC3 WAN PLL with dual reference inputs. It contains a Digital Phase-Locked Loop (DPLL), which generates low jitter ST-BUS and 19.44 MHz clock and framing signals that are phase locked to an 8 kHz, 1.544 MHz, 2.048 MHz or 19.44 MHz input reference. The IDT82V3012 provides 9 types of clock signals (C1.5o, C3o, C6o, C2o, C4o, C8o, C16o, C19o, C32o) and 7 types of framing signals (F0o, F8o, F16o, F19o, F32o, RSP, TSP) for multitrunk T1/E1 and STS3/OC3 links. The IDT82V3012 is compliant with AT&T TR62411, Telcordia GR- 1244-CORE Stratum 3, Stratum 4 Enhanced and Stratum 4, ETSI ETS 300 011, ITU-T G.813 Option 1, and ITU-T G.812 Type IV clocks. It meets the jitter/wander tolerance, jitter/wander transfer, intrinsic jitter/ wander, frequency accuracy, capture range, phase change slope, holdover frequency accuracy and MTIE (Maximum Time Interval Error) requirements for these specifications. The IDT82V3012 can be used in synchronization and timing control for T1, E1 and OC3 systems, or used as ST-BUS clock and frame pulse source. It also can be used in access switch, access routers, ATM edge switches, wireless base station controllers, or IADs (Integrated Access Devices), PBXs, line cards and SONET/SDH equipments. PIN CONFIGURATION Figure - 1 IDT82V3012 SSOP56 Package Pin Assignment IDT82V3012 14 15 16 17 18 19 20 21 22 23 24 RST MON_out0 Fref1 Fref0 F19o OSCi F8o C1.5o LOCK C2o C4o FLOCK F0_sel1 F0_sel0 C3o C8o C16o C32o F0o F16o 1 2 3 4 5 6 7 8 9 10 11 12 13 56 55 54 RSP TSP C6o VDDD TDI TMS TRST TDO TCK IC0 HOLDOVER FREERUN NORMAL TIE_en VDDD VSS VSS C19o MODE_sel0 MODE_sel1 TCLR IN_sel 25 26 27 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 28 29 VDDD VSS VDDA VSS F32o VSS VDDA C2/C1.5 IC2 F1_sel0 F1_sel1 C19NEG C19POS MON_out1 |
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