поискавой системы для электроныых деталей
  Russian  ▼
ALLDATASHEETRU.COM

X  

Preview PDF HTML

AD6654/PCB датащи(PDF) 55 Page - Analog Devices

номер детали AD6654/PCB
подробное описание детали  14-Bit, 92.16 MSPS, 4-/6-Channel Wideband IF to Baseband Receiver
PDF  88 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
производитель  AD [Analog Devices]
домашняя страница  http://www.analog.com
Logo AD - Analog Devices

AD6654/PCB датащи(HTML) 55 Page - Analog Devices

Back Button AD6654/PCB Datasheet HTML 51Page - Analog Devices AD6654/PCB Datasheet HTML 52Page - Analog Devices AD6654/PCB Datasheet HTML 53Page - Analog Devices AD6654/PCB Datasheet HTML 54Page - Analog Devices AD6654/PCB Datasheet HTML 55Page - Analog Devices AD6654/PCB Datasheet HTML 56Page - Analog Devices AD6654/PCB Datasheet HTML 57Page - Analog Devices AD6654/PCB Datasheet HTML 58Page - Analog Devices AD6654/PCB Datasheet HTML 59Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 55 / 88 page
background image
AD6654
Rev. 0 | Page 55 of 88
MASTER/SLAVE PCLK MODES
The parallel ports can operate in either master or slave mode.
The mode is set via PCLK master mode bit in the Parallel Port
Control 2 register. The parallel ports power up in slave mode to
avoid possible contentions on the PCLK pin.
In master mode, PCLK is an output derived by dividing
PLL_CLK down by the PCLK divisor. The PCLK divisor can
have a value of 1, 2, 4, or 8, depending on the 2-bit PCLK
divisor word setting in the Parallel Port Control 2 register. The
highest PLCK rate in master mode is 200 MHz. Master mode is
selected by setting the PCLK master mode bit in the Parallel
Port Control 2 register.
divisor
PCLK
rate
CLK
PLL
rate
PCLK
_
=
In slave mode, external circuitry provides the PCLK signal.
Slave mode PCLK signals can be either synchronous or
asynchronous. The maximum slave mode PCLK frequency is
also 200 MHz.
PCLK
tDPREQ
PxREQ
PxACK
tDPP
Px [15:0]
I [15:8]
Q [15:8]
PxIQ
tDPIQ
PxCH [2:0]
PxCH [2:0] = CHANNEL #
tDPCH
0000 +
GAIN [11:0]
PxGAIN
tDPGAIN
Figure 60. Parallel I/Q Mode with an AGC Gain Word



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88


датащи скачать

Go To PDF Page


ссылки URL



Вашему бизинису помогли Аллдатащит?  [ DONATE ] 

Что такое Аллдатащит   |   реклама   |   контакт   |   Конфиденциальность   |   Ссылка на техническое описание    |   обмен ссыками   |   поиск по производителю
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com