FXPS7115D4 datasheet(43/72 Pages) NXP

43 / 72 page

NXP Semiconductors

FXPS7115D4

Digital absolute pressure sensor, 40 kPa to 115 kPa

Bit

Symbol

Description

7 to 4

ST_CTRL[3:0]

The self-test control bits select one of the various analog and digital self-test features of the device as shown in

Table 73. The self-test control bits are not included in the read/write array error detection.

3 to 0

reserved

These bits are reserved.

Table 72. DSP_CFG_U5 - DSP user configuration #5 register (address 44h) bit description

ST_CTRL[3] ST_CTRL[2] ST_CTRL[1] ST_CTRL[0] Function

SNS_DATAx_X contents

16-bit data

Normal pressure signal

reserved

P-cell common mode verification

reserved

DSP write to SNS_DATAx_X registers inhibited. 0000h

DSP write to SNS_DATAx_X registers inhibited. AAAAh

DSP write to SNS_DATAx_X registers inhibited. 5555h

DSP write to SNS_DATAx_X registers inhibited. FFFFh

reserved

Digital self-test 0

8171h

Digital self-test 1

6C95h

Digital self-test 2

807Ah

Digital self-test 3

78ACh

Table 73. Self-test control bits (ST_CTRL[3:0])

7.7.12 INT_CFG - interrupt configuration register (address 45h)

The interrupt configuration register contains configuration information for the interrupt output. This register can

be written during initialization but is locked once the ENDINIT bit is set (see Section 7.7.4 "DEVLOCK_WR -

lock register writes register (address 10h)"). The register is included in the read/write array error detection.

Bit

Symbol

reserved

INT_PS[1:0]

INT_POLARITY

reserved

Reset

Access

R/W

Table 74. INT_CFG - interrupt configuration register (address 45h) bit allocation

FXPS7115D4

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 6.1 — 7 June 2023

43 / 72

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