© VITESSE SEMICONDUCTOR CORPORATION

Page 13

2/23/00

741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896

VITESSE

SEMICONDUCTOR CORPORATION

Target Specification

VSC8124

2.488 Gb/s Quad

Data Re-timer

G52271-0, Rev. 1.14

Table 10: Package Pin Identification

Signal

Pin

I/O

Level

Pin Description

VCC

1

PWR

+3.3V

REV

2

O

ANALOG

Do not connect

VEE

3

PWR

GND

SDAT3+

4

I

CML

High speed data input

5

PWR

VTERM

SDAT3-

6

I

CML

High speed data input

VEE

7

PWR

GND

VCC

8

PWR

+3.3V

SDAT2+

9

I

CML

High speed data input

10

PWR

VTERM

SDAT2-

11

I

CML

High speed data input

VEE

12

PWR

GND

VCC

13

PWR

+3.3V

VCC

14

PWR

+3.3V

SDAT1+

15

I

CML

High speed data input

16

PWR

VTERM

SDAT1-

17

I

CML

High speed data input

VCC

18

PWR

+3.3V

VEE

19

PWR

GND

SDAT0+

20

I

CML

High speed data input

21

PWR

VTERM

SDAT0-

22

I

CML

High speed data input

VCC

23

PWR

+3.3V

VEE

24

PWR

GND

VCC

25

PWR

+3.3V

VCC

26

PWR

+3.3V

VEE

27

PWR

GND

VCC

28

PWR

+3.3V

TEST29

29

I

TTL

Do not connect

TEST30

30

I

TTL

Do not connect

VEE

31

PWR

GND

RDAT0+

32

O

CML

Retimed data output

NC

33

-

NC

RDAT0-

34

O

CML

Retimed data output

35

PWR

+3.3V

36

PWR

GND

RDAT1+

37

O

CML

Retimed data output