ICS9FG1901 datasheet(14/18 Pages) RENESAS

номер детали	ICS9FG1901

подробное описание детали	Frequency Generator for P4™ CPU, PCI Express™ & Fully Buffered DIMM Clocks

PDF	18 Pages

Scroll/Zoom	100%

производитель	RENESAS [Renesas Technology Corp]

домашняя страница	http://www.renesas.com

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14 / 18 page

Integrated

Circuit

Systems, Inc.

ICS9FG1901

0962E—01/02/07

SMBusTable: Reserved Register

Pin #

Name

Control Function

Type0

PWD

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

SMBus Table: 1:1 PLL Frequency Control Register

Pin #

Name

Control Function

Type0

PWD

Bit 7

1:1 PLL N Div8

N Divider Prog bit 8

Bit 6

1:1 PLL N Div9

N Divider Prog bit 9

Bit 5

1:1 PLL M Div5

Bit 4

1:1 PLL M Div4

Bit 3

1:1 PLL M Div3

Bit 2

1:1 PLL M Div2

Bit 1

1:1 PLL M Div1

Bit 0

1:1 PLL M Div0

SMBus Table: 1:1 PLL Frequency Control Register

Pin #

Name

Control Function

Type0

PWD

Bit 7

1:1 PLL N Div7

Bit 6

1:1 PLL N Div6

Bit 5

1:1 PLL N Div5

Bit 4

1:1 PLL N Div4

Bit 3

1:1 PLL N Div3

Bit 2

1:1 PLL N Div2

Bit 1

1:1 PLL N Div1

Bit 0

1:1 PLL N Div0

SMBusTable: 1:1 PLL Output Divider Register (Rev H and higher)

Pin #

Name

Control Function

Type0

PWD

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

1:1 PLL OutDiv 3

PLL 2 Output Divider

Bit 2

1:1 PLL OutDiv 2

PLL 2 Output Divider

Bit 1

1:1 PLL OutDiv 1

PLL 2 Output Divider

Bit 0

1:1 PLL OutDiv 0

PLL 2 Output Divider

Byte 16

Byte 17

Byte 19

Byte 18

RESERVED

See Output Divider Table

N Divider Programming b(7:0)

RESERVED

M Divider Programming bits

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