ICS9DB823B

EIGHT OUTPUT DIFFERENTIAL BUFFER FOR PCIE GEN1, GEN2 AND QPI

IDT®

EIGHT OUTPUT DIFFERENTIAL BUFFER FOR PCIE GEN1, GEN2 AND QPI

10

ICS9DB823B

REV F 091812

Clock Periods–Differential Outputs with Spread Spectrum Enabled

Clock Periods–Differential Outputs with Spread Spectrum Disabled

1 Clock

1us

0.1s

0.1s

0.1s

1us

1 Clock

Lg-

-SSC

-ppm error

0ppm

+ ppm error

+SSC

Lg+

Absolute

Period

Short-term

Average

Long-Term

Average

Period

Long-Term

Average

Short-term

Average

Period

Minimum

Absolute

Period

Minimum

Absolute

Period

Minimum

Absolute

Period

Nominal

Maximum

Maximum

Maximum

DIF 100

9.949

9.999

10.024

10.025

10.026

10.051

10.101

ns

1,2,3

DIF 133

7.449

7.499

7.518

7.519

7.520

7.538

7.588

ns

1,2,4

DIF 166

5.949

5.999

6.014

6.015

6.016

6.031

6.081

ns

1,2,5

DIF 200

4.950

5.000

5.012

5.013

5.013

5.026

5.076

ns

1,2,5

DIF 266

3.700

3.750

3.759

3.759

3.760

3.769

3.819

ns

1,2,5

DIF 333

2.950

3.000

3.007

3.008

3.008

3.015

3.065

ns

1,2,5

DIF 400

2.450

2.500

2.506

2.506

2.507

2.513

2.563

ns

1,2,5

Units

Measurement

Window

Symbol

Notes

Definition

1 Clock

1us

0.1s

0.1s

0.1s

1us

1 Clock

Lg-

-SSC

-ppm error

0ppm

+ ppm error

+SSC

Lg+

Absolute

Period

Short-term

Average

Long-Term

Average

Period

Long-Term

Average

Short-term

Average

Period

Minimum

Absolute

Period

Minimum

Absolute

Period

Minimum

Absolute

Period

Nominal

Maximum

Maximum

Maximum

DIF 100

9.949

9.999

10.000

10.001

10.051

ns

1,2,3

DIF 133

7.449

7.499

7.500

7.501

7.551

ns

1,2,4

DIF 166

5.949

5.999

6.000

6.001

6.051

ns

1,2,5

DIF 200

4.950

5.000

5.000

5.001

5.051

ns

1,2,5

DIF 266

3.700

3.750

3.750

3.750

3.800

ns

1,2,5

DIF 333

2.950

3.000

3.000

3.000

3.050

ns

1,2,5

DIF 400

2.450

2.500

2.500

2.500

2.550

ns

1,2,5

1Guaranteed by design and characterization, not 100% tested in production.

3 Driven by SRC output of main clock, PCIe PLL Mode or Bypass mode

4 Driven by CPU output of main clock, QPI PLL Mode or Bypass mode

5 Driven by CPU output of CK410B+/CK420BQ/CK505 main clock, Bypass mode only

Definition

2 All Long Term Accuracy specifications are guaranteed with the assumption that the input clock complies with CK410B+ accuracy

requirements. The 9DB423/823 itself does not contribute to ppm error.

Notes

Measurement

Window

Units

Symbol